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<?xml version="1.0"?>
<!DOCTYPE flagsdescription SYSTEM "http://www.spec.org/dtd/cpuflags2.dtd">
<flagsdescription>
<filename>HP-Platform-Flags-Intel-V1.2-revB</filename>
<title>SPEC CPU2006 Platform Settings for HP Proliant Intel-based systems</title>
<os_tuning>
<![CDATA[
<p><b>OS Tuning</b></p>
<p><b> submit= MYMASK=`printf '0x%x' \$((1<<\$SPECCOPYNUM))`; /usr/bin/taskset \$MYMASK $command </b></p>
<p>
When running multiple copies of benchmarks, the SPEC config file feature
<b>submit</b> is sometimes used to cause individual jobs to be bound to
specific processors. This specific submit command is used for Linux.
The description of the elements of the command are:</p>
<ul>
<li> <b>/usr/bin/taskset [options] [mask] [pid | command [arg] ... ]</b>: <br />
taskset is used to set or retreive the CPU affinity of a running
process given its PID or to launch a new COMMAND with a given CPU
affinity. The CPU affinity is represented as a bitmask, with the
lowest order bit corresponding to the first logical CPU and highest
order bit corresponding to the last logical CPU. When the taskset
returns, it is guaranteed that the given program has been scheduled
to a legal CPU. <br /><br />
The default behaviour of taskset is to run a new command with a
given affinity mask: <br /><br />
taskset [mask] [command] [arguments] </li>
<li> <b>$MYMASK</b>: The bitmask (in hexadecimal) corresponding to a specific
SPECCOPYNUM. For example, $MYMASK value for the first copy of a
rate run will be 0x00000001, for the second copy of the rate will
be 0x00000002 etc. Thus, the first copy of the rate run will have a
CPU affinity of CPU0, the second copy will have the affinity CPU1
etc.</li>
<li> <b>$command</b>: Program to be started, in this case, the benchmark instance
to be started. </li>
</ul>
<p><b>Using numactl to bind processes and memory to cores</b></p>
<p>For multi-copy runs or single copy runs on systems with multiple sockets,
it is advantageous to bind a process to a particular core. Otherwise, the OS
may arbitrarily move your process from one core to another. This can effect
performance. To help, SPEC allows the use of a "submit" command where users
can specify a utility to use to bind processes. We have found the utility 'numactl'
to be the best choice.</p>
<p>numactl runs processes with a specific NUMA scheduling or memory placement
policy. The policy is set for a command and inherited by all of its children.
The numactl flag "--physcpubind" specifies which core(s) to bind the process.
"-l" instructs numactl to keep a process memory on the local node while "-m"
specifies which node(s) to place a process memory. For full details on using
numactl, please refer to your Linux documentation, 'man numactl'</p>
<p><b>numactl --interleave=all "runspec command" </b></p>
<p> Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be
allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall
back to other nodes.</p>
<p><b>Transparent Huge Pages</b></p>
<p>On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes.
Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads.
If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller
4k pages instead. Hugepages are used by default if /sys/kernel/mm/redhat_transparent_hugepage/enabled is set to always.
</p>
<p><b>Drive Write Cache</b></p>
<p>The Drive Write Cache is an option that can be enabled or disabled in the HP Array Configuration Utility, CLI version. The default
value for the Drive Write Cache is set to Disabled, and in order to change this the HP Arracy Configuration Utility, CLI version needs
to be installed. When the Drive Write Cache option is enabled on a HP Smart Arrary Controller in a system, it can allow the HP Smart
Array Controller to help make drive writes more efficient.
</p>
<p><b>Accelerator Ratio</b></p>
<p>The Accelerator Ratio is an option that can be set to different percentages (in 25% increments) in the HP Array Configuration Utility,
CLI version. The default value for the Accelerator Ratio is set to 0% Read and 100% Write. In order to change this the HP Arracy
Configuration Utility, CLI version needs to be installed. Changing the Accelerator Ratio allows the array installed on the HP Smart Arrary
Controller to adjust how it priotizes reads and writes.
</p>
<p><b> ulimit -s [n | unlimited] (Linux) </b></p>
<p>
Sets the stack size to <b>n</b> kbytes, or <b>unlimited</b> to allow the stack size
to grow without limit. </p>
<p><b> KMP_STACKSIZE=integer[B|K|M|G|T] (Linux) </b></p>
<p>
Sets the number of bytes to allocate for each parallel thread to use as its
private stack. Use the optional suffix B, K, M, G, or T, to specify bytes,
kilobytes, megabytes, gigabytes, or terabytes. The default setting is 2M on
IA32 and 4M on IA64. </p>
<p><b> KMP_AFFINITY=physical,n (Linux) </b></p>
<p>
Assigns threads to consecutive physical processors (for example, cores),
beginning at processor n. Specifies the static mapping of user threads to
physical cores, beginning at processor n. For example, if a system is configured
with 8 cores, and OMP_NUM_THREADS=8 and KMP_AFFINITY=physical,2 are set, then
thread 0 will mapped to core 2, thread 1 will be mapped to core 3, and so on in
a round-robin fashion. </p>
<p><b> OMP_NUM_THREADS=n </b></p>
<p>
This Environment Variable sets the maximum number of threads to use for OpenMP*
parallel regions to <b>n</b> if no other value is specified in the application. This
environment variable applies to both -openmp and -parallel (Linux)
or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8
cores:<br />
export OMP_NUM_THREADS=8<br />
Default is the number of cores visible to the OS.
</p>
<p><b> vm.max_map_count-n (Linux) </b></p>
<p>
The maximum number of memory map areas a process may have. Memory map areas
are used as a side-effect of calling malloc, directly by mmap and mprotect,
and also when loading shared libraries. </p>
<p><b> Disabled unused Linux services via stop_services.sh script.</b></p>
<p>
The following unused Linux services were disabled before the run in simple shell scirpt via the command "service {name} stop":
abrt-ccpp, abrt-oops, abrtd, acpid, atd, auditd, autofs, avahi-daemon, cgconfig, cpuspeed, crond, cups, haldaemon,
irqbalance, kdump, libvirt-guests, mcelogd, mdmonitor, messagebus, portreserve, postfix, rhnsd, rhsmcertd, rpcbind,
rpcgssd, rpcidmapd, certmonger, lvm2-monitor, netfs, and sysstat.</p>
]]>
</os_tuning>
<firmware>
<![CDATA[
<p><b>Firmware Settings</b></p>
<p>One or more of the following settings may have been set. If so, the "Platform Notes" section of the
report will say so; and you can read below to find out more about what these settings mean.</p>
<p><b>Intel Hyperthreading Options (Default = Enabled):</b></p>
<p>
This feature allows enabling/disabling of logical processor cores on processors
supporting Intel's Hyper-Threading Technology. This option may improve overall
performance for applications that will benefit from higher processor core count.</p>
<p><b>Processor Core Disable (Intel Core Select) (Default = number of physical cores/processor):</b></p>
<p>
This feature allows disabling of processor cores using Intel's Core Multi-Processing (CMP)
Technology. This option allows disabling of a specific number of the cores on each physical
processor. This option has the following potential uses: Reduce processor power usage and
potentially improve performance/watt with some applications; improve overall performance
for applications that will benefit from higher performance cores rather than more processing
cores; address issues with software that is licensed on a per-core basis.</p>
<p> The value entered should be the number of enabled cores per socket. Valid values are 1 to 12
where 1 indicates that one core will be ENABLED per processor socket. A value of 0 is invalid
as the minimum number of enabled cores per processor socket is 1.</p>
<p><b>HP Power Profile (Default = Balanced Power and Performance):</b></p>
<p> Values for this BIOS setting can be:</p>
<ul>
<li><b>Balanced Power and Performance</b>: Provides the optimum settings to
maximize power savings with minimal impact to performance for most Operating
Systems and applications.</li>
<li><b>Minimum Power Usage</b>: Enables power reduction mechanisms that may
negatively affect performance. This mode will guarantee a lower maximum power
usage by the system.</li>
<li><b>Maximum Performance</b>: Disables all power management options that may
negatively affect performance.</li>
<li><b>Custom</b>:Allows the user to customize power management options independent
of the defaults that each preset Power Profile sets. The HP Power Profile also will
automatically change to this value if a power management option such as
Energy/Performance Bias, Collaborative Power Control, or Processor Power and
Utilization Monitoring is changed from the default value that is associated with one
of the preset Power Profiles.</li>
</ul>
<p><b>Power Regulator for ProLiant support (Default=HP Dynamic Power Savings Mode)</b></p>
<p>Values for this BIOS setting can be:</p>
<ul>
<li><b>HP Dynamic Power Savings Mode</b>: Automatically varies processor
speed and power usage based on processor utilization. Allows
reducing overall power consumption with little or no impact to
performance. Does not require OS support. </li>
<li><b>HP Static Low Power Mode</b>: Reduces processor speed and power usage.
Guarantees a lower maximum power usage for the system. Performance
impacts will be greater for environments with higher processor
utilization. </li>
<li><b>HP Static High Performance Mode</b>: Processors will run in their
maximum power/performance state at all times regardless of the
OS power managment policy. </li>
<li><b>OS Control Mode</b>: Processors will run in their maximum power/
performance state at all times unless the OS enables' a power
management policy. </li>
</ul>
<p><b>Minimum Processor Idle Power Core State (Default (w/HP Power Profile=Maximum Performance)=No C-states):</b></p>
<p> This feature selects the processor's lowest idle core power state (C-state) which the
operating system will utilize. The higher the C-State, the lower the power usage of that
idle state (Core C6 is the lowest power idle core state supported by the processor).
Values for this setting can be:</p>
<ul>
<li><b>C6 State</b>: While in C6, the core PLLs are turned off, the core caches are flushed
and the core state is saved to the Last Level Cache. Power Gates are used to reduce power
consumption to close to zero. C6 is considered an inactive core.</li>
<li><b>C3 State</b>: While in C3 the core PLLs are turned off, and all the core caches are
flushed. C3 is considred an inactive core.</li>
<li><b>C1E State</b>: C1E is defined as the enhanced halt state. While in C1E no instructions
are being executed. C1E considered an active core. </li>
<li><b>No C-states</b>: No C-states is defined as C0, which is defined as the active state.
While in C0, instructions are being executed by the core.</li>
</ul>
<p><b>Minimum Processor Idle Power Package State (Default (w/HP Power Profile=Maximum Performance)=No Package state):</b></p>
<p> This feature selects the processor's lowest idle package power state (C-state) which is enabled. The proecessor
will automatically transition into the package C-states based on the Core C-states which cores on the processor
have transitioned to. The higher the package C-state, the lower the power usage of that idle package state
(Package C6 (retention) is the lowed power idle package state supported by the processor).
Values for this setting can be:</p>
<ul>
<li><b>Package C6 (retention) State</b>: All cores have saved their architectural state and have had their
core voltages reduced to zero volts. The LLC retains context, but no accesses can be made to the LLC in
this state, the cores must break out to the internaal state package C2 for snoops to occur.</li>
<li><b>Package C6 (non-retention) State</b>: All cores have saved their architectural state and have had their
core voltages reduced to zero volts. The LLC does not retain context, and no accesses can be made to the LLC in
this state, the cores must break out to the internaal state package C2 for snoops to occur.</li>
<li><b>No Package State</b>: All cores are in an active state and have not entered any power saving state.</li>
</ul>
<p><b>Energy/Performance Bias (Default = Balanced Performance):</b></p>
<p> This option configures several processor subsystems to optimize the processor's
performance and power usage.
Values for this BIOS setting can be:</p>
<ul>
<li><b>Maximum Performance Mode</b>: Should be used for environments that
require the highes performance and lowest latency but are not sensitive to
power consumption.</li>
<li><b>Balanced Performance</b>: Provides optimum performance efficiency.</li>
<li><b>Balanced Power</b>: Provieds optimum power efficiency and is recommended
for most environments.</li>
<li><b>Power Savings Mode</b>: Should only be used in environments that are power
sensitive and are willing to accept reduced performance.</li>
</ul>
<p><b>Collaborative Power Control (Default = Enabled):</b></p>
<p>
This BIOS option allows the enabling/disabling of the Processor Clocking Controll
(PCC) Interface, for operating systems which support this feature. Enabling this
option allows the Operating System to request processor frequency changes even when
the server has the Power Regulator option configured for Dynamic Power Savings Mode.</p>
<p>
For Operating Systems that do not support the PCC Interface or when the Power
Regulator Mode is not configured for Dynamic Power Savings Mode, this option has
no impact on system operation.</p>
<p><b>Dynamic Power Capping Functionality (Default = Enabled):</b></p>
<p>
This BIOS option allows the user to disable the System ROM Power Calibration feature
that is executed during the boot process. When disabled, the user can expect faster
boot times but will not be able to enable a Dynamic Power Cap until this feature is
re-enabled.</p>
<p><b>Memory Power Savings Mode (Default = Balanced):</b></p>
<p> This option configures several memory parameters to optmizie the memory subsystems performance
and power usage.
Values for this BIOS setting can be:</p>
<ul>
<li><b>Balanced</b>: Balanced provieds optimum power efficiency and is recommended for most environments.</li>
<li><b>Maximum Performance</b>: Maximum Performance Mode should be used for environments that require the
highest performance and/or lowest latency but are not sensitive to power consumption.</li>
</ul>
<p><b>Thermal Configuration (Default = Optimal Cooling):</b></p>
<p>This feature allows the user to select the fan cooling solution for the system.
Values for this BIOS option can be:</p>
<ul>
<li><b>Optimal Cooling</b>: Provides the most efficient solution by
configuring fan speeds to the minimum required to provide adequate
cooling.</li>
<li><b>Increased Cooling</b>: Will run fans at higher speeds to provide
aditional cooling. Increased Cooling should be selected when non-HP
storage controllers are cabled to the embedded hard drive cage, or if
the system is experiencing thermal issues that cannot be resolved in
another manner.</li>
<li><b>Maximum Cooling</b>: Will provide the maximum cooling available by
this platform.</li>
</ul>
<p><b>HW Prefetch (Default = Enabled):</b></p>
<p>
This BIOS option allows allows the enabling/disabling of a processor
mechanism to prefetch data into the cache according to a pattern
recognition algorithm.</p>
<p>
In some limited cases, setting this option to Disabled may improve
performance. In the majority of cases, the default value of Enabled
provides better performance. Users should only disable this option
after performing application benchmarking to verify improved
performance in their environment.</p>
<p><b>Adjacent Sector Prefetch (Default = Enabled):</b></p>
<p>
This BIOS option allows the enabling/disabling of a processor mechanism to
fetch the adjacent cache line within an 128-byte sector that contains
the data needed due to a cache line miss. </p>
<p>
In some limited cases, setting this option to Disabled may improve
performance. In the majority of cases, the default value of Enabled
provides better performance. Users should only disable this option
after performing application benchmarking to verify improved
performance in their environment.</p>
<p><b>Processor Power and Utilization Monitoring (Default = Enabled):</b></p>
<p>
This BIOS option allows the enabling/disabling of iLo4 Processor
State Mode Switching and Insight Power Management Processor Utilization
Monitoring.</p>
<p>
When set to disabled, the system will also set the HP Power Regulator
mode to HP Static High Performance mode and the HP Power Profile mode
to Custom. This option may be useful in some environments that require
absolute minimum latency.</p>
<p><b>Memory Refresh Rate (Default = 2x Refresh):</b></p>
<p>
This BIOS option controls the refresh rate of the memory controller and
may affect the performance and resiliency of the servers memory.</p>
<p>
When set to 1x Refresh, the memory refresh rate will be decreased, the
HP Power Regulator mode will be set to HP Static High Performance mode,
and the HP Power Profile mode to Custom. This option may be useful in
some environments that require absolute minimum latency.</p>
<p>
When set to 3x Refresh, the memory refresh rate will be increased, the
HP Power Regulator mode will be set to HP Static High Performance mode,
and the HP Power Profile mode to Custom.</p>
]]>
</firmware>
</flagsdescription>
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