<?xml version="1.0"?>
<!DOCTYPE flagsdescription SYSTEM "http://www.spec.org/dtd/cpuflags2.dtd">
<flagsdescription>

<filename>Fujitsu-Platform.xml</filename>

<title>SPEC CPU2006 Flag Description - Platform settings
</title>

<firmware>
 <![CDATA[ 
	 <p><b>Hardware Prefetch:</b></p> 
	 <p>
	 This BIOS option allows the enabling/disabling of a processor mechanism to                 
	 prefetch data into the cache according to a pattern-recognition algorithm.
	 </p>
	 <p>                
	 In some cases, setting this option to Disabled may improve
	 performance. Users should only disable this option 
	 after performing application benchmarking to verify improved
	 performance in their environment.
	 </p>

	 <p><b>Adjacent Sector Prefetch:</b></p> 
	 <p>
	 This BIOS option allows the enabling/disabling of a processor mechanism to                 
	 fetch the adjacent cache line within an 128-byte sector that contains 
	 the data needed due to a cache line miss.
	 </p>
	 <p>                
	 In some cases, setting this option to Disabled may improve
	 performance. Users should only disable this option 
	 after performing application benchmarking to verify improved
	 performance in their environment.
	 </p>  
     
	 <p>                
	 <b>Hyper-Threading Technology:</b></p>
	 <p>                
	 Disabling Intel's Hyper-Threading Technology reduces the number of threads per
	 core to 1. The default is Enabled; in this case each core provides additional
     resources for executing up to 2 threads in parallel.
     </p>

          <p>
          <b>Frequency Floor Override: </b></p>
          <p>
          Enabling this feature sets a minimum floor frequency at which all cores will run independent of what           frequency the cores are requesting. This function is designed to improve IO performance and remote               socket performance.Setting a higher floor will increase power costs.
         </p>


  ]]> 
</firmware>

</flagsdescription>