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<?xml version="1.0"?>
<!DOCTYPE flagsdescription SYSTEM "http://www.spec.org/dtd/cpuflags2.dtd">
<flagsdescription>
<filename>Dell-Platform-Settings-V1.2-revA</filename>
<title>SPEC CPU2006 Platform Settings for Intel-based systems</title>
<firmware>
<![CDATA[
<p><b>Hardware Prefetcher:</b></p>
<p>
This BIOS option allows the enabling/disabling of a processor mechanism
to prefetch data into the cache according to a pattern-recognition algorithm
In some cases, setting this option to Disabled may improve performance.
Users should only disable this option after performing application benchmarking
to verify improved performance in their environment.
</p>
<p><b>Adjacent Cache Line Prefetch:</b></p>
<p>
This BIOS option allows the enabling/disabling of a processor mechanism
to fetch the adjacent cache line within a 128-byte sector that contains the
data needed due to a cache line miss.
In some cases, setting this option to Disabled may improve performance.
Users should only disable this option after performing application benchmarking
to verify improved performance in their environment.
</p>
<p><b>High Bandwidth:</b></p>
<p>
Enabling this option allows the chipset to defer memory transactions and
process them out of order for optimal performance.
</p>
<p><b>Data Reuse:</b></p>
<p>
Enabling this BIOS option reduces the frequency of L3 cache updates from L1. This may improve performance by reducing the internal bandwidth consumed by constantly updating L1 cache lines in L3.
Since this results in more fetches to main memory, setting this option to Disabled may improve performance in some cases. Users should only disable this option after performing application benchmarking
to verify improved performance in their environment.
</p>
<p><b>Logical Processor:</b></p>
<p>
This BIOS setting enables/disables Intel's Hyper-Threading (HT) Technology. With HT Technology, the operating system can execute two threads in parallel within each processor core.
</p>
<p><b>Node Interleaving:</b></p>
<p>
This BIOS option allows the enabling/disabling of memory interleaving across CPU nodes. When disabled, each CPU chip can only access memory within its own node.
</p>
<p><b>CPU Power Management:</b></p>
<p>
This BIOS setting allows configuration of various demand-based switching schemes.
<b>Maximum Performance</b> maintains full voltage to processor internal components, even during periods of inactivity,
eliminating the performance penalty associated with the phase transitions between high and low load.
</p>
<p><b>Memory Frequency:</b></p>
<p>
This BIOS setting allows the memory to be clocked to the highest supported frequency.
</p>
<p><b>Turbo Boost:</b></p>
<p>
ntel Turbo Boost Technology is a processor feature which allows the processor to transition to a higher frequency than the processor's rate speed if the processor has available power headroom and is within temperature specifications. Disabling this feature will reduce power usage but will reduce the system's maximum achievable performance under some workloads.
</p>
<p><b>C States:</b></p>
<p>
Enabling the CPU States causes the CPU to enter a low-power mode when the CPU is idle.
</p>
<p><b>System Profile:</b></p>
<p>
This BIOS option sets the performance and power management aggressiveness for the system. It is a collection of selections including a custom selection designed to allow customers to choose the ideal operating profile for their server system environment. It includes settings like CPU Power Management, Memory Frequency, Turbo Boost, C1E and C States.
</p>
]]>
</firmware>
</flagsdescription>
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