From: Paolo Bonzini <pbonzini@redhat.com>
Date: Mon, 27 Feb 2023 10:57:09 +0100
Subject: [PATCH] target/i386: add FSRM to TCG

commit c0728d4e3d23356691e4182eac54c67e1ca26618 upstream.

Fast short REP MOVS can be added to TCG, since a trivial translation
of string operation is a good option for short lengths.

Intel-SIG: commit c0728d4e3d23 target/i386: add FSRM to TCG.
Add SPR/GNR/SRA new ISAs backporting

Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[ Quanxian Wang: amend commit log ]
Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 7d779c6a8..e54a60d3c 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -661,7 +661,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
 #define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | \
           /* CPUID_7_0_ECX_OSPKE is dynamic */ \
           CPUID_7_0_ECX_LA57 | CPUID_7_0_ECX_PKS)
-#define TCG_7_0_EDX_FEATURES 0
+#define TCG_7_0_EDX_FEATURES CPUID_7_0_EDX_FSRM
 #define TCG_7_1_EAX_FEATURES 0
 #define TCG_APM_FEATURES 0
 #define TCG_6_EAX_FEATURES CPUID_6_EAX_ARAT
-- 
2.25.1