; AVS enable
; OTP data is stored in SM0~SM2 from GPP1
; SVC_REV is stored in SM3
; SM4 is the AVS value to set into register
;
LOAD_SM_VAL: SM4 0x98E3FFFF ;# Set VDD to 1150mV by default
;
TEST_SM_AND_BRANCH: SM3 0x0000000F 0x2 < AVSR	;use default value if SVC_REV<2
;
; read SVC_1000Mhz in OTP Data[43:38] = (D1>>6 & 0x3F)
RSHIFT_SM_VAL: SM1 6
ADD_SM_VAL: SM1 0xd	;base voltage is 0.898V(0xd), AVS=OTP+0xd
AND_SM_VAL: SM1 0x3F
; set AVS to register
LOAD_SM_VAL: SM4 0x9000FFFF
LSHIFT_SM_VAL: SM1 16
OR_SM_SM: SM4 SM1
LSHIFT_SM_VAL: SM1 6
OR_SM_SM: SM4 SM1
;
; perform AVS reset
LABEL: AVSR
STORE_SM_ADDR: SM4 0xC0011500
AND_VAL: 0xC0011500 0x1FFFFFFF	;# release AVS reset
OR_VAL: 0xC0011500 0x50000000	;# Enable AVS
DELAY: 0x000186A0               ;# Delay 100ms for AVS voltage wake up
; Switch all clocks to REFCLOCK
WRITE: 0XC0013010 0x00000000
WRITE: 0XC0018010 0x00000000
; TBG-A: SE vco_div 0x1,
; DIFF vco_div 0x1, vco_range 0xa
; tbg_N 0x30 KVCO = 1600 MHz
WRITE: 0xC0013204 0x00F00091
WRITE: 0xC0013204 0x00F000C1
WRITE: 0xC0013220 0x08030803
WRITE: 0xC0013208 0x94011400
WRITE: 0xC0013230 0x00040002
WRITE: 0xC0013208 0x94011400
WRITE: 0xC001320C 0x56E656E5
WRITE: 0xC0013210 0x014B014A
WRITE: 0xC001320C 0x56E656E5
WRITE: 0xC0013204 0x00F000C0
WRITE: 0xC0013208 0x94011400
WAIT_FOR_BIT_SET: 0xC0013208 0x80008000 0x00100000
DELAY: 0x00000100
; TBG-B: SE vco_div 0x1,
; DIFF vco_div 0x2, vco_range 0xb
; tbg_N 0x3c KVCO = 2000 MHz
WRITE: 0xC0013204 0x00F100C0
WRITE: 0xC0013204 0x00F100C0
WRITE: 0xC0013220 0x08030803
WRITE: 0xC0013208 0x14019400
WRITE: 0xC0013230 0x00040002
WRITE: 0xC0013208 0x14019400
WRITE: 0xC001320C 0x56E656E5
WRITE: 0xC0013210 0x014B014A
WRITE: 0xC001320C 0x56E656E5
WRITE: 0xC0013204 0x00F000C0
WRITE: 0xC0013208 0x14019400
WAIT_FOR_BIT_SET: 0xC0013208 0x80008000 0x00100000
DELAY: 0x00000100
; Set clocks to 1000/800 preset
WRITE: 0xC0013014 0x00000000
WRITE: 0xC0013004 0x1296202C
WRITE: 0xC0013008 0x21061AA9
WRITE: 0xC001300C 0x20543084
WRITE: 0xC0013000 0x03CFCCF2
WRITE: 0xC0018014 0x00180000
WRITE: 0xC0018004 0x02515508
WRITE: 0xC0018008 0x00300880
WRITE: 0xC001800C 0x00000540
WRITE: 0xC0018000 0x003F8F40
WRITE: 0xC0013210 0x014B014A
; Switch all clocks to back dividers
WRITE: 0xC0013010 0x00009FFF
WRITE: 0xC0018010 0x000007AA