From 41717af8988db9c2d9d8b753f306f6deaa1cec8d Mon Sep 17 00:00:00 2001
From: Jiri Denemark <[email protected]>
Date: Tue, 19 May 2020 15:08:11 +0200
Subject: [PATCH 2/3] cpu_map: Add Cooperlake x86 CPU model

The stepping range (10-11) is likely incomplete. QEMU uses 10 and the
CPUID data for Cooperlake show 11. We will update the range if needed
once more details about he CPU are available.

Signed-off-by: Jiri Denemark <[email protected]>
Reviewed-by: Pavel Hrdina <[email protected]>
Signed-off-by: Jingyi Wang <[email protected]>
---
 src/cpu_map/index.xml                         |  1 +
 src/cpu_map/x86_Cooperlake.xml                | 89 +++++++++++++++++++
 .../domaincapsdata/qemu_5.0.0-q35.x86_64.xml  |  1 +
 .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml  |  1 +
 tests/domaincapsdata/qemu_5.0.0.x86_64.xml    |  1 +
 5 files changed, 93 insertions(+)
 create mode 100644 src/cpu_map/x86_Cooperlake.xml

diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index 672d0a3c92..3ccc76b9ed 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -54,6 +54,7 @@
     <include filename="x86_Icelake-Client-noTSX.xml"/>
     <include filename="x86_Icelake-Server.xml"/>
     <include filename="x86_Icelake-Server-noTSX.xml"/>
+    <include filename="x86_Cooperlake.xml"/>
 
     <!-- AMD CPUs -->
     <include filename="x86_athlon.xml"/>
diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml
new file mode 100644
index 0000000000..77e695aea4
--- /dev/null
+++ b/src/cpu_map/x86_Cooperlake.xml
@@ -0,0 +1,89 @@
+<cpus>
+  <model name='Cooperlake'>
+    <decode host='on' guest='on'/>
+    <vendor name='Intel'/>
+    <feature name="3dnowprefetch"/>
+    <feature name="abm"/>
+    <feature name="adx"/>
+    <feature name="aes"/>
+    <feature name="apic"/>
+    <feature name="arat"/>
+    <feature name="arch-capabilities"/>
+    <feature name="avx"/>
+    <feature name="avx2"/>
+    <feature name="avx512-bf16"/>
+    <feature name="avx512bw"/>
+    <feature name="avx512cd"/>
+    <feature name="avx512dq"/>
+    <feature name="avx512f"/>
+    <feature name="avx512vl"/>
+    <feature name="avx512vnni"/>
+    <feature name="bmi1"/>
+    <feature name="bmi2"/>
+    <feature name="clflush"/>
+    <feature name="clflushopt"/>
+    <feature name="clwb"/>
+    <feature name="cmov"/>
+    <feature name="cx16"/>
+    <feature name="cx8"/>
+    <feature name="de"/>
+    <feature name="erms"/>
+    <feature name="f16c"/>
+    <feature name="fma"/>
+    <feature name="fpu"/>
+    <feature name="fsgsbase"/>
+    <feature name="fxsr"/>
+    <feature name="hle"/>
+    <feature name="ibrs-all"/>
+    <feature name="invpcid"/>
+    <feature name="lahf_lm"/>
+    <feature name="lm"/>
+    <feature name="mca"/>
+    <feature name="mce"/>
+    <feature name="mds-no"/>
+    <feature name="mmx"/>
+    <feature name="movbe"/>
+    <feature name="msr"/>
+    <feature name="mtrr"/>
+    <feature name="nx"/>
+    <feature name="pae"/>
+    <feature name="pat"/>
+    <feature name="pcid"/>
+    <feature name="pclmuldq"/>
+    <feature name="pdpe1gb"/>
+    <feature name="pge"/>
+    <feature name="pku"/>
+    <feature name="pni"/>
+    <feature name="popcnt"/>
+    <feature name="pschange-mc-no"/>
+    <feature name="pse"/>
+    <feature name="pse36"/>
+    <feature name="rdctl-no"/>
+    <feature name="rdrand"/>
+    <feature name="rdseed"/>
+    <feature name="rdtscp"/>
+    <feature name="rtm"/>
+    <feature name="sep"/>
+    <feature name="skip-l1dfl-vmentry"/>
+    <feature name="smap"/>
+    <feature name="smep"/>
+    <feature name="spec-ctrl"/>
+    <feature name="ssbd"/>
+    <feature name="sse"/>
+    <feature name="sse2"/>
+    <feature name="sse4.1"/>
+    <feature name="sse4.2"/>
+    <feature name="ssse3"/>
+    <feature name="stibp"/>
+    <feature name="syscall"/>
+    <feature name="taa-no"/>
+    <feature name="tsc"/>
+    <feature name="tsc-deadline"/>
+    <feature name="vme"/>
+    <feature name="x2apic"/>
+    <feature name="xgetbv1"/>
+    <feature name="xsave"/>
+    <feature name="xsavec"/>
+    <feature name="xsaveopt"/>
+  </model>
+</cpus>
diff --git a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
index ff721530cd..fa945fc002 100644
--- a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
@@ -93,6 +93,7 @@
       <model usable='no'>EPYC-IBPB</model>
       <model usable='no'>EPYC</model>
       <model usable='no'>Dhyana</model>
+      <model usable='no'>Cooperlake</model>
       <model usable='yes'>Conroe</model>
       <model usable='no'>Cascadelake-Server-noTSX</model>
       <model usable='no'>Cascadelake-Server</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
index d567863f49..a0eeed7c2d 100644
--- a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
@@ -101,6 +101,7 @@
       <model usable='no'>EPYC-IBPB</model>
       <model usable='no'>EPYC</model>
       <model usable='no'>Dhyana</model>
+      <model usable='no'>Cooperlake</model>
       <model usable='yes'>Conroe</model>
       <model usable='no'>Cascadelake-Server-noTSX</model>
       <model usable='no'>Cascadelake-Server</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
index 2c6066003d..fbde7a6ba2 100644
--- a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
@@ -92,6 +92,7 @@
       <model usable='no'>EPYC-IBPB</model>
       <model usable='no'>EPYC</model>
       <model usable='no'>Dhyana</model>
+      <model usable='no'>Cooperlake</model>
       <model usable='yes'>Conroe</model>
       <model usable='no'>Cascadelake-Server-noTSX</model>
       <model usable='no'>Cascadelake-Server</model>
-- 
2.27.0