From 31d01cfd0b4d6fca757269bc1216e01d0f944386 Mon Sep 17 00:00:00 2001
From: Lixing <[email protected]>
Date: Wed, 19 Jul 2023 14:29:38 +0800
Subject: [PATCH] Add missing opcode and 3A6000

Sync to vec.27
---
 bfd/elfnn-loongarch.c                     |   27 +-
 gas/testsuite/gas/loongarch/3a6000.d      |   63 ++
 gas/testsuite/gas/loongarch/3a6000.s      |   65 ++
 gas/testsuite/gas/loongarch/loongarch.exp |   23 +
 include/elf/loongarch.h                   |    1 -
 opcodes/loongarch-opc.c                   | 1202 ++++++++++++---------
 6 files changed, 824 insertions(+), 557 deletions(-)
 create mode 100644 gas/testsuite/gas/loongarch/3a6000.d
 create mode 100644 gas/testsuite/gas/loongarch/3a6000.s
 create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp

diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c
index cf4d539d..ac4bcc20 100644
--- a/bfd/elfnn-loongarch.c
+++ b/bfd/elfnn-loongarch.c
@@ -6,6 +6,7 @@
 #include "objalloc.h"
 #include "elf/loongarch.h"
 #include "elfxx-loongarch.h"
+#include <stdint.h>
 
 static bfd_boolean
 loongarch_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
@@ -714,7 +715,6 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 	    h->plt.refcount = 0;
 	  h->plt.refcount++;
 	  h->needs_plt = 1;
-
 	   elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
 	}
 
@@ -826,6 +826,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
 
 	  if (0 != strcmp(sec->name, ".eh_frame"))
 	    need_dynreloc = 1;
+
 	  /* If resolved symbol is defined in this object,
 	       1. Under pie, the symbol is known. We convert it
 		  into R_LARCH_RELATIVE and need load-addr still.
@@ -1097,7 +1098,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
 {
   struct bfd_link_info *info;
   struct loongarch_elf_link_hash_table *htab;
-  struct loongarch_elf_link_hash_entry *eh;
   struct elf_dyn_relocs *p;
 
   if (h->root.type == bfd_link_hash_indirect)
@@ -1272,7 +1272,6 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
 	  if (h->dynindx == -1)
 	    loongarch_elf_hash_entry(h)->dyn_relocs = NULL;
 	}
-
     }
 
   for (p = loongarch_elf_hash_entry(h)->dyn_relocs; p != NULL; p = p->next)
@@ -1473,14 +1472,14 @@ loongarch_elf_size_dynamic_sections (bfd *output_bfd,
 	}
     }
 
+  /* Allocate global sym .plt and .got entries, and space for global
+     sym dynamic relocs.  */
+  elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info);
 
   /* Allocate global ifunc sym .plt and .got entries, and space for global
      ifunc sym dynamic relocs.  */
   elf_link_hash_traverse (&htab->elf, elfNN_allocate_ifunc_dynrelocs, info);
 
-  /* Allocate global sym .plt and .got entries, and space for global
-     sym dynamic relocs.  */
-  elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info);
   /* Allocate .plt and .got entries, and space for local ifunc symbols.  */
   htab_traverse (htab->loc_hash_table,
 		 (void *) elfNN_allocate_local_ifunc_dynrelocs, info);
@@ -2241,6 +2240,7 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 	     b. 此外，比如代码段的重定位无法动态改变其的引用位置，所以必须走plt
 	     来实现IFUNC。
 	     c. 因此，为方便实现，我们将plt stub的位置当作IFUNC符号的定义。 */
+
 	  defined_local = TRUE;
 	  resolved_local = TRUE;
 	  resolved_dynly = FALSE;
@@ -2281,13 +2281,13 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 	      /* When generating a shared object, these relocations are copied
 		 into the output file to be resolved at run time.  */
 
-
 	      outrel.r_offset = _bfd_elf_section_offset (output_bfd, info,
 							 input_section,
 							 rel->r_offset);
 
 	      unresolved_reloc = (!((bfd_vma) -2 <= outrel.r_offset)
 				  && (input_section->flags & SEC_ALLOC));
+
 	      outrel.r_offset += sec_addr (input_section);
 
 	      /* A pointer point to a ifunc symbol.  */
@@ -2426,7 +2426,7 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 	    }
 
 	  break;
- 
+
 	case R_LARCH_SOP_PUSH_TLS_TPREL:
 	  if (resolved_local)
 	    {
@@ -2443,7 +2443,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 		     (info, input_bfd, input_section, rel, howto,
 		      bfd_reloc_undefined, is_undefweak, name,
 		      "TLS LE just can be resolved local only."));
-
 	  break;
 
 	case R_LARCH_SOP_PUSH_ABSOLUTE:
@@ -2563,7 +2562,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 			      bfd_reloc_dangerous, is_undefweak, name,
 			      "Internal: PLT stub doesn't represent.  "
 			      "Resolve it with pcrel"));
-
 		  i = 1, j = 3;
 		}
 	    }
@@ -2587,7 +2585,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 				"PLT shouldn't be with r_addend."));
 		      break;
 		    }
-
 		  relocation = sec_addr (plt) + h->plt.offset - pc;
 		  break;
 		}
@@ -2681,7 +2678,7 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 				    "Internal: "));
 			  break;
 			}
- 
+
 		      asection *s;
 		      Elf_Internal_Rela outrel;
 		      /* We need to generate a R_LARCH_RELATIVE reloc
@@ -2731,7 +2728,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 	      /* The offset must always be a multiple of the word size.
 		 So, we can use the least significant bit to record
 		 whether we have already processed this entry.  */
-
 	      if ((local_got_offsets[r_symndx] & 1) == 0)
 		{
 		  if (is_pic)
@@ -2761,12 +2757,11 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 		}
 	    }
 	  relocation = off;
+
 	  break;
 
 	case R_LARCH_SOP_PUSH_TLS_GOT:
-	  is_ie = TRUE;
 	case R_LARCH_SOP_PUSH_TLS_GD:
-
 	  {
 	    unresolved_reloc = FALSE;
 	    if (r_type == R_LARCH_SOP_PUSH_TLS_GOT)
@@ -2866,7 +2861,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 		  }
 	      }
 
-
 	    relocation = (got_off & (~(bfd_vma)1)) + (is_ie ? ie_off : 0);
 	  }
 	  break;
@@ -2898,7 +2892,6 @@ loongarch_elf_relocate_section (bfd *output_bfd,
 			bfd_reloc_dangerous, is_undefweak, name,
 			"Seems dynamic linker not process "
 			"sections 'SEC_DEBUGGING'."));
-
 	      break;
 	    }
 	  if (!is_dyn)
diff --git a/gas/testsuite/gas/loongarch/3a6000.d b/gas/testsuite/gas/loongarch/3a6000.d
new file mode 100644
index 00000000..eca22eb4
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/3a6000.d
@@ -0,0 +1,63 @@
+#as:
+#objdump: -dr
+
+.*:[    ]+file format .*
+
+
+Disassembly of section .text:
+
+00000000.* <.text>:
+[ 	]+0:[ 	]+38570881[ 	]+sc.q[ 	]+\$r1,\$r2,\$r4
+[ 	]+4:[ 	]+38570881[ 	]+sc.q[ 	]+\$r1,\$r2,\$r4
+[ 	]+8:[ 	]+38578041[ 	]+llacq.w[ 	]+\$r1,\$r2
+[ 	]+c:[ 	]+38578841[ 	]+llacq.d[ 	]+\$r1,\$r2
+[ 	]+10:[ 	]+38578041[ 	]+llacq.w[ 	]+\$r1,\$r2
+[ 	]+14:[ 	]+38578841[ 	]+llacq.d[ 	]+\$r1,\$r2
+[ 	]+18:[ 	]+38578441[ 	]+screl.w[ 	]+\$r1,\$r2
+[ 	]+1c:[ 	]+38578c41[ 	]+screl.d[ 	]+\$r1,\$r2
+[ 	]+20:[ 	]+38578441[ 	]+screl.w[ 	]+\$r1,\$r2
+[ 	]+24:[ 	]+38578c41[ 	]+screl.d[ 	]+\$r1,\$r2
+[ 	]+28:[ 	]+38580881[ 	]+amcas.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+2c:[ 	]+38588881[ 	]+amcas.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+30:[ 	]+38590881[ 	]+amcas.w[ 	]+\$r1,\$r2,\$r4
+[ 	]+34:[ 	]+38598881[ 	]+amcas.d[ 	]+\$r1,\$r2,\$r4
+[ 	]+38:[ 	]+38580881[ 	]+amcas.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+3c:[ 	]+38588881[ 	]+amcas.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+40:[ 	]+38590881[ 	]+amcas.w[ 	]+\$r1,\$r2,\$r4
+[ 	]+44:[ 	]+38598881[ 	]+amcas.d[ 	]+\$r1,\$r2,\$r4
+[ 	]+48:[ 	]+385a0881[ 	]+amcas_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+4c:[ 	]+385a8881[ 	]+amcas_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+50:[ 	]+385b0881[ 	]+amcas_db.w[ 	]+\$r1,\$r2,\$r4
+[ 	]+54:[ 	]+385b8881[ 	]+amcas_db.d[ 	]+\$r1,\$r2,\$r4
+[ 	]+58:[ 	]+385a0881[ 	]+amcas_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+5c:[ 	]+385a8881[ 	]+amcas_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+60:[ 	]+385b0881[ 	]+amcas_db.w[ 	]+\$r1,\$r2,\$r4
+[ 	]+64:[ 	]+385b8881[ 	]+amcas_db.d[ 	]+\$r1,\$r2,\$r4
+[ 	]+68:[ 	]+385c0881[ 	]+amswap.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+6c:[ 	]+385c8881[ 	]+amswap.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+70:[ 	]+385d0881[ 	]+amadd.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+74:[ 	]+385d8881[ 	]+amadd.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+78:[ 	]+385c0881[ 	]+amswap.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+7c:[ 	]+385c8881[ 	]+amswap.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+80:[ 	]+385d0881[ 	]+amadd.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+84:[ 	]+385d8881[ 	]+amadd.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+88:[ 	]+385e0881[ 	]+amswap_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+8c:[ 	]+385e8881[ 	]+amswap_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+90:[ 	]+385f0881[ 	]+amadd_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+94:[ 	]+385f8881[ 	]+amadd_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+98:[ 	]+385e0881[ 	]+amswap_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+9c:[ 	]+385e8881[ 	]+amswap_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+a0:[ 	]+385f0881[ 	]+amadd_db.b[ 	]+\$r1,\$r2,\$r4
+[ 	]+a4:[ 	]+385f8881[ 	]+amadd_db.h[ 	]+\$r1,\$r2,\$r4
+[ 	]+a8:[ 	]+01147441[ 	]+frecipe.s[ 	]+\$f1,\$f2
+[ 	]+ac:[ 	]+01147841[ 	]+frecipe.d[ 	]+\$f1,\$f2
+[ 	]+b0:[ 	]+729d1441[ 	]+vfrecipe.s[ 	]+\$vr1,\$vr2
+[ 	]+b4:[ 	]+729d1841[ 	]+vfrecipe.d[ 	]+\$vr1,\$vr2
+[ 	]+b8:[ 	]+769d1441[ 	]+xvfrecipe.s[ 	]+\$xr1,\$xr2
+[ 	]+bc:[ 	]+769d1841[ 	]+xvfrecipe.d[ 	]+\$xr1,\$xr2
+[ 	]+c0:[ 	]+01148441[ 	]+frsqrte.s[ 	]+\$f1,\$f2
+[ 	]+c4:[ 	]+01148841[ 	]+frsqrte.d[ 	]+\$f1,\$f2
+[ 	]+c8:[ 	]+729d2441[ 	]+vfrsqrte.s[ 	]+\$vr1,\$vr2
+[ 	]+cc:[ 	]+729d2841[ 	]+vfrsqrte.d[ 	]+\$vr1,\$vr2
+[ 	]+d0:[ 	]+769d2441[ 	]+xvfrsqrte.s[ 	]+\$xr1,\$xr2
+[ 	]+d4:[ 	]+769d2841[ 	]+xvfrsqrte.d[ 	]+\$xr1,\$xr2
diff --git a/gas/testsuite/gas/loongarch/3a6000.s b/gas/testsuite/gas/loongarch/3a6000.s
new file mode 100644
index 00000000..cd355235
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/3a6000.s
@@ -0,0 +1,65 @@
+# sc.q $rd, $rk, $rj
+sc.q $r1, $r2, $r4
+sc.q $r1, $r2, $r4, 0
+
+llacq.w $r1, $r2
+llacq.d $r1, $r2
+llacq.w $r1, $r2, 0
+llacq.d $r1, $r2, 0
+
+screl.w $r1, $r2
+screl.d $r1, $r2
+screl.w $r1, $r2, 0
+screl.d $r1, $r2, 0
+
+# amcas.b $rd, $rk, $rj
+amcas.b $r1, $r2, $r4
+amcas.h $r1, $r2, $r4
+amcas.w $r1, $r2, $r4
+amcas.d $r1, $r2, $r4
+amcas.b $r1, $r2, $r4, 0
+amcas.h $r1, $r2, $r4, 0
+amcas.w $r1, $r2, $r4, 0
+amcas.d $r1, $r2, $r4, 0
+
+amcas_db.b $r1, $r2, $r4
+amcas_db.h $r1, $r2, $r4
+amcas_db.w $r1, $r2, $r4
+amcas_db.d $r1, $r2, $r4
+amcas_db.b $r1, $r2, $r4, 0
+amcas_db.h $r1, $r2, $r4, 0
+amcas_db.w $r1, $r2, $r4, 0
+amcas_db.d $r1, $r2, $r4, 0
+
+amswap.b $r1, $r2, $r4
+amswap.h $r1, $r2, $r4
+amadd.b $r1, $r2, $r4
+amadd.h $r1, $r2, $r4
+amswap.b $r1, $r2, $r4, 0
+amswap.h $r1, $r2, $r4, 0
+amadd.b $r1, $r2, $r4, 0
+amadd.h $r1, $r2, $r4, 0
+
+amswap_db.b $r1, $r2, $r4
+amswap_db.h $r1, $r2, $r4
+amadd_db.b $r1, $r2, $r4
+amadd_db.h $r1, $r2, $r4
+amswap_db.b $r1, $r2, $r4, 0
+amswap_db.h $r1, $r2, $r4, 0
+amadd_db.b $r1, $r2, $r4, 0
+amadd_db.h $r1, $r2, $r4, 0
+
+frecipe.s $f1, $f2
+frecipe.d $f1, $f2
+vfrecipe.s $vr1, $vr2
+vfrecipe.d $vr1, $vr2
+xvfrecipe.s $xr1, $xr2
+xvfrecipe.d $xr1, $xr2
+
+frsqrte.s $f1, $f2
+frsqrte.d $f1, $f2
+vfrsqrte.s $vr1, $vr2
+vfrsqrte.d $vr1, $vr2
+xvfrsqrte.s $xr1, $xr2
+xvfrsqrte.d $xr1, $xr2
+
diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp
new file mode 100644
index 00000000..8e256cd6
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/loongarch.exp
@@ -0,0 +1,23 @@
+# Expect script for LoongArch assembler tests.
+#   Copyright (C) 2011-2018 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if [istarget loongarch*-*-*] {
+    run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+}
diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h
index 02085dd3..09a8ad23 100644
--- a/include/elf/loongarch.h
+++ b/include/elf/loongarch.h
@@ -1,7 +1,6 @@
 #ifndef _ELF_LOONG_H
 #define _ELF_LOONG_H
 
-#include <stdint.h>
 #include "elf/reloc-macros.h"
 #include "libiberty.h"
 
diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index fb36e561..21b0aff0 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -257,529 +257,452 @@ static struct loongarch_opcode loongarch_macro_opcodes[] = {
 {0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_fix_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x00001000, 0xfffffc00,	"clo.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00001400, 0xfffffc00,	"clz.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00001800, 0xfffffc00,	"cto.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00001c00, 0xfffffc00,	"ctz.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00002000, 0xfffffc00,	"clo.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00002400, 0xfffffc00,	"clz.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00002800, 0xfffffc00,	"cto.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00002c00, 0xfffffc00,	"ctz.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00003000, 0xfffffc00,	"revb.2h",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00003400, 0xfffffc00,	"revb.4h",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00003800, 0xfffffc00,	"revb.2w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00003c00, 0xfffffc00,	"revb.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00004000, 0xfffffc00,	"revh.2w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00004400, 0xfffffc00,	"revh.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00004800, 0xfffffc00,	"bitrev.4b",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00004c00, 0xfffffc00,	"bitrev.8b",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00005000, 0xfffffc00,	"bitrev.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00005400, 0xfffffc00,	"bitrev.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00005800, 0xfffffc00,	"ext.w.h",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00005c00, 0xfffffc00,	"ext.w.b",	"r0:5,r5:5",			0,			0,	0,	0 },
-  /* or %1,%2,$r0  */
-  { 0x00150000, 0xfffffc00,	"move",		"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00006000, 0xfffffc00,	"rdtimel.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00006400, 0xfffffc00,	"rdtimeh.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00006800, 0xfffffc00,	"rdtime.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00006c00, 0xfffffc00,	"cpucfg",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x00010000, 0xffff801f,	"asrtle.d",	"r5:5,r10:5",			0,			0,	0,	0 },
-  { 0x00018000, 0xffff801f,	"asrtgt.d",	"r5:5,r10:5",			0,			0,	0,	0 },
-  { 0x00040000, 0xfffe0000,	"alsl.w",	"r0:5,r5:5,r10:5,u15:2+1",	0,			0,	0,	0 },
-  { 0x00060000, 0xfffe0000,	"alsl.wu",	"r0:5,r5:5,r10:5,u15:2+1",	0,			0,	0,	0 },
-  { 0x00080000, 0xfffe0000,	"bytepick.w",	"r0:5,r5:5,r10:5,u15:2",	0,			0,	0,	0 },
-  { 0x000c0000, 0xfffc0000,	"bytepick.d",	"r0:5,r5:5,r10:5,u15:3",	0,			0,	0,	0 },
-  { 0x00100000, 0xffff8000,	"add.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00108000, 0xffff8000,	"add.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00110000, 0xffff8000,	"sub.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00118000, 0xffff8000,	"sub.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00120000, 0xffff8000,	"slt",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00128000, 0xffff8000,	"sltu",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00130000, 0xffff8000,	"maskeqz",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00138000, 0xffff8000,	"masknez",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00140000, 0xffff8000,	"nor",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00148000, 0xffff8000,	"and",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00150000, 0xffff8000,	"or",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00158000, 0xffff8000,	"xor",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00160000, 0xffff8000,	"orn",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00168000, 0xffff8000,	"andn",		"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00170000, 0xffff8000,	"sll.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00178000, 0xffff8000,	"srl.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00180000, 0xffff8000,	"sra.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00188000, 0xffff8000,	"sll.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00190000, 0xffff8000,	"srl.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00198000, 0xffff8000,	"sra.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001b0000, 0xffff8000,	"rotr.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001b8000, 0xffff8000,	"rotr.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001c0000, 0xffff8000,	"mul.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001c8000, 0xffff8000,	"mulh.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001d0000, 0xffff8000,	"mulh.wu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001d8000, 0xffff8000,	"mul.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001e0000, 0xffff8000,	"mulh.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001e8000, 0xffff8000,	"mulh.du",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001f0000, 0xffff8000,	"mulw.d.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x001f8000, 0xffff8000,	"mulw.d.wu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00200000, 0xffff8000,	"div.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00208000, 0xffff8000,	"mod.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00210000, 0xffff8000,	"div.wu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00218000, 0xffff8000,	"mod.wu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00220000, 0xffff8000,	"div.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00228000, 0xffff8000,	"mod.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00230000, 0xffff8000,	"div.du",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00238000, 0xffff8000,	"mod.du",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00240000, 0xffff8000,	"crc.w.b.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00248000, 0xffff8000,	"crc.w.h.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00250000, 0xffff8000,	"crc.w.w.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00258000, 0xffff8000,	"crc.w.d.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00260000, 0xffff8000,	"crcc.w.b.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00268000, 0xffff8000,	"crcc.w.h.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00270000, 0xffff8000,	"crcc.w.w.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x00278000, 0xffff8000,	"crcc.w.d.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x002a0000, 0xffff8000,	"break",	"u0:15",			0,			0,	0,	0 },
-  { 0x002a8000, 0xffff8000,	"dbcl",		"u0:15",			0,			0,	0,	0 },
-  { 0x002b0000, 0xffff8000,	"syscall",	"u0:15",			0,			0,	0,	0 },
-  { 0x002c0000, 0xfffe0000,	"alsl.d",	"r0:5,r5:5,r10:5,u15:2+1",	0,			0,	0,	0 },
-  { 0x00408000, 0xffff8000,	"slli.w",	"r0:5,r5:5,u10:5",		0,			0,	0,	0 },
-  { 0x00410000, 0xffff0000,	"slli.d",	"r0:5,r5:5,u10:6",		0,			0,	0,	0 },
-  { 0x00448000, 0xffff8000,	"srli.w",	"r0:5,r5:5,u10:5",		0,			0,	0,	0 },
-  { 0x00450000, 0xffff0000,	"srli.d",	"r0:5,r5:5,u10:6",		0,			0,	0,	0 },
-  { 0x00488000, 0xffff8000,	"srai.w",	"r0:5,r5:5,u10:5",		0,			0,	0,	0 },
-  { 0x00490000, 0xffff0000,	"srai.d",	"r0:5,r5:5,u10:6",		0,			0,	0,	0 },
-  { 0x004c8000, 0xffff8000,	"rotri.w",	"r0:5,r5:5,u10:5",		0,			0,	0,	0 },
-  { 0x004d0000, 0xffff0000,	"rotri.d",	"r0:5,r5:5,u10:6",		0,			0,	0,	0 },
-  { 0x00600000, 0xffe08000,	"bstrins.w",	"r0:5,r5:5,u16:5,u10:5",	0,			0,	0,	0 },
-  { 0x00608000, 0xffe08000,	"bstrpick.w",	"r0:5,r5:5,u16:5,u10:5",	0,			0,	0,	0 },
-  { 0x00800000, 0xffc00000,	"bstrins.d",	"r0:5,r5:5,u16:6,u10:6",	0,			0,	0,	0 },
-  { 0x00c00000, 0xffc00000,	"bstrpick.d",	"r0:5,r5:5,u16:6,u10:6",	0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-
-static struct loongarch_opcode loongarch_single_float_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x01008000, 0xffff8000,	"fadd.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01028000, 0xffff8000,	"fsub.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01048000, 0xffff8000,	"fmul.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01068000, 0xffff8000,	"fdiv.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01088000, 0xffff8000,	"fmax.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010a8000, 0xffff8000,	"fmin.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010c8000, 0xffff8000,	"fmaxa.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010e8000, 0xffff8000,	"fmina.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01108000, 0xffff8000,	"fscaleb.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01128000, 0xffff8000,	"fcopysign.s",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01140400, 0xfffffc00,	"fabs.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01141400, 0xfffffc00,	"fneg.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01142400, 0xfffffc00,	"flogb.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01143400, 0xfffffc00,	"fclass.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01144400, 0xfffffc00,	"fsqrt.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01145400, 0xfffffc00,	"frecip.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01146400, 0xfffffc00,	"frsqrt.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01149400, 0xfffffc00,	"fmov.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x0114a400, 0xfffffc00,	"movgr2fr.w",	"f0:5,r5:5",			0,			0,	0,	0 },
-  { 0x0114ac00, 0xfffffc00,	"movgr2frh.w",	"f0:5,r5:5",			0,			0,	0,	0 },
-  { 0x0114b400, 0xfffffc00,	"movfr2gr.s",	"r0:5,f5:5",			0,			0,	0,	0 },
-  { 0x0114bc00, 0xfffffc00,	"movfrh2gr.s",	"r0:5,f5:5",			0,			0,	0,	0 },
-  { 0x0114c000, 0xfffffc00,	"movgr2fcsr",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x0114c800, 0xfffffc00,	"movfcsr2gr",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x0114d000, 0xfffffc18,	"movfr2cf",	"c0:3,f5:5",			0,			0,	0,	0 },
-  { 0x0114d400, 0xffffff00,	"movcf2fr",	"f0:5,c5:3",			0,			0,	0,	0 },
-  { 0x0114d800, 0xfffffc18,	"movgr2cf",	"c0:3,r5:5",			0,			0,	0,	0 },
-  { 0x0114dc00, 0xffffff00,	"movcf2gr",	"r0:5,c5:3",			0,			0,	0,	0 },
-  { 0x011a0400, 0xfffffc00,	"ftintrm.w.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a2400, 0xfffffc00,	"ftintrm.l.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a4400, 0xfffffc00,	"ftintrp.w.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a6400, 0xfffffc00,	"ftintrp.l.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a8400, 0xfffffc00,	"ftintrz.w.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011aa400, 0xfffffc00,	"ftintrz.l.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011ac400, 0xfffffc00,	"ftintrne.w.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011ae400, 0xfffffc00,	"ftintrne.l.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011b0400, 0xfffffc00,	"ftint.w.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011b2400, 0xfffffc00,	"ftint.l.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011d1000, 0xfffffc00,	"ffint.s.w",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011d1800, 0xfffffc00,	"ffint.s.l",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011e4400, 0xfffffc00,	"frint.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-
-static struct loongarch_opcode loongarch_double_float_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x01010000, 0xffff8000,	"fadd.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01030000, 0xffff8000,	"fsub.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01050000, 0xffff8000,	"fmul.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01070000, 0xffff8000,	"fdiv.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01090000, 0xffff8000,	"fmax.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010b0000, 0xffff8000,	"fmin.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010d0000, 0xffff8000,	"fmaxa.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x010f0000, 0xffff8000,	"fmina.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01110000, 0xffff8000,	"fscaleb.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01130000, 0xffff8000,	"fcopysign.d",	"f0:5,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x01140800, 0xfffffc00,	"fabs.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01141800, 0xfffffc00,	"fneg.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01142800, 0xfffffc00,	"flogb.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01143800, 0xfffffc00,	"fclass.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01144800, 0xfffffc00,	"fsqrt.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01145800, 0xfffffc00,	"frecip.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01146800, 0xfffffc00,	"frsqrt.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01149800, 0xfffffc00,	"fmov.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x0114a800, 0xfffffc00,	"movgr2fr.d",	"f0:5,r5:5",			0,			0,	0,	0 },
-  { 0x0114b800, 0xfffffc00,	"movfr2gr.d",	"r0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01191800, 0xfffffc00,	"fcvt.s.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x01192400, 0xfffffc00,	"fcvt.d.s",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a0800, 0xfffffc00,	"ftintrm.w.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a2800, 0xfffffc00,	"ftintrm.l.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a4800, 0xfffffc00,	"ftintrp.w.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a6800, 0xfffffc00,	"ftintrp.l.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011a8800, 0xfffffc00,	"ftintrz.w.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011aa800, 0xfffffc00,	"ftintrz.l.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011ac800, 0xfffffc00,	"ftintrne.w.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011ae800, 0xfffffc00,	"ftintrne.l.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011b0800, 0xfffffc00,	"ftint.w.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011b2800, 0xfffffc00,	"ftint.l.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011d2000, 0xfffffc00,	"ffint.d.w",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011d2800, 0xfffffc00,	"ffint.d.l",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0x011e4800, 0xfffffc00,	"frint.d",	"f0:5,f5:5",			0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-
-static struct loongarch_opcode loongarch_lmm_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x02000000, 0xffc00000,	"slti",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x02400000, 0xffc00000,	"sltui",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x02800000, 0xffc00000,	"addi.w",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x02c00000, 0xffc00000,	"addi.d",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x03000000, 0xffc00000,	"lu52i.d",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"nop",		"",				"andi $r0,$r0,0",	0,	0,	0 },
-  { 0x03400000, 0xffc00000,	"andi",		"r0:5,r5:5,u10:12",		0,			0,	0,	0 },
-  { 0x03800000, 0xffc00000,	"ori",		"r0:5,r5:5,u10:12",		0,			0,	0,	0 },
-  { 0x03c00000, 0xffc00000,	"xori",		"r0:5,r5:5,u10:12",		0,			0,	0,	0 },
-  { 0x10000000, 0xfc000000,	"addu16i.d",	"r0:5,r5:5,s10:16",		0,			0,	0,	0 },
-  { 0x14000000, 0xfe000000,	"lu12i.w",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0x16000000, 0xfe000000,	"lu32i.d",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0x18000000, 0xfe000000,	"pcaddi",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0x1a000000, 0xfe000000,	"pcalau12i",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0x1c000000, 0xfe000000,	"pcaddu12i",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0x1e000000, 0xfe000000,	"pcaddu18i",	"r0:5,s5:20",			0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-
-static struct loongarch_opcode loongarch_privilege_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x04000000, 0xff0003e0,	"csrrd",	"r0:5,u10:14",			0,			0,	0,	0 },
-  { 0x04000020, 0xff0003e0,	"csrwr",	"r0:5,u10:14",			0,			0,	0,	0 },
-  { 0x04000000, 0xff000000,	"csrxchg",	"r0:5,r5:5,u10:14",		0,			0,	0,	0 },
-  { 0x06000000, 0xffc00000,	"cacop",	"u0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x06400000, 0xfffc0000,	"lddir",	"r0:5,r5:5,u10:8",		0,			0,	0,	0 },
-  { 0x06440000, 0xfffc001f,	"ldpte",	"r5:5,u10:8",			0,			0,	0,	0 },
-  { 0x06480000, 0xfffffc00,	"iocsrrd.b",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06480400, 0xfffffc00,	"iocsrrd.h",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06480800, 0xfffffc00,	"iocsrrd.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06480c00, 0xfffffc00,	"iocsrrd.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06481000, 0xfffffc00,	"iocsrwr.b",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06481400, 0xfffffc00,	"iocsrwr.h",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06481800, 0xfffffc00,	"iocsrwr.w",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06481c00, 0xfffffc00,	"iocsrwr.d",	"r0:5,r5:5",			0,			0,	0,	0 },
-  { 0x06482000, 0xffffffff,	"tlbclr",	"",				0,			0,	0,	0 },
-  { 0x06482400, 0xffffffff,	"tlbflush",	"",				0,			0,	0,	0 },
-  { 0x06482800, 0xffffffff,	"tlbsrch",	"",				0,			0,	0,	0 },
-  { 0x06482c00, 0xffffffff,	"tlbrd",	"",				0,			0,	0,	0 },
-  { 0x06483000, 0xffffffff,	"tlbwr",	"",				0,			0,	0,	0 },
-  { 0x06483400, 0xffffffff,	"tlbfill",	"",				0,			0,	0,	0 },
-  { 0x06483800, 0xffffffff,	"ertn",		"",				0,			0,	0,	0 },
-  { 0x06488000, 0xffff8000,	"idle",		"u0:15",			0,			0,	0,	0 },
-  { 0x06498000, 0xffff8000,	"invtlb",	"u0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-
-static struct loongarch_opcode loongarch_4opt_single_float_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x08100000, 0xfff00000,	"fmadd.s",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08500000, 0xfff00000,	"fmsub.s",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08900000, 0xfff00000,	"fnmadd.s",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08d00000, 0xfff00000,	"fnmsub.s",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x0c100000, 0xffff8018,	"fcmp.caf.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c108000, 0xffff8018,	"fcmp.saf.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c110000, 0xffff8018,	"fcmp.clt.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c118000, 0xffff8018,	"fcmp.slt.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c118000, 0xffff8018,	"fcmp.sgt.s",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c120000, 0xffff8018,	"fcmp.ceq.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c128000, 0xffff8018,	"fcmp.seq.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c130000, 0xffff8018,	"fcmp.cle.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c138000, 0xffff8018,	"fcmp.sle.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c138000, 0xffff8018,	"fcmp.sge.s",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c140000, 0xffff8018,	"fcmp.cun.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c148000, 0xffff8018,	"fcmp.sun.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c150000, 0xffff8018,	"fcmp.cult.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c150000, 0xffff8018,	"fcmp.cugt.s",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c158000, 0xffff8018,	"fcmp.sult.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c160000, 0xffff8018,	"fcmp.cueq.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c168000, 0xffff8018,	"fcmp.sueq.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c170000, 0xffff8018,	"fcmp.cule.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c170000, 0xffff8018,	"fcmp.cuge.s",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c178000, 0xffff8018,	"fcmp.sule.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c180000, 0xffff8018,	"fcmp.cne.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c188000, 0xffff8018,	"fcmp.sne.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c1a0000, 0xffff8018,	"fcmp.cor.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c1a8000, 0xffff8018,	"fcmp.sor.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c1c0000, 0xffff8018,	"fcmp.cune.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c1c8000, 0xffff8018,	"fcmp.sune.s",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0d000000, 0xfffc0000,	"fsel",		"f0:5,f5:5,f10:5,c15:3",	0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
-};
-static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x08200000, 0xfff00000,	"fmadd.d",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08600000, 0xfff00000,	"fmsub.d",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08a00000, 0xfff00000,	"fnmadd.d",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x08e00000, 0xfff00000,	"fnmsub.d",	"f0:5,f5:5,f10:5,f15:5",	0,			0,	0,	0 },
-  { 0x0c200000, 0xffff8018,	"fcmp.caf.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c208000, 0xffff8018,	"fcmp.saf.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c210000, 0xffff8018,	"fcmp.clt.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c218000, 0xffff8018,	"fcmp.slt.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c218000, 0xffff8018,	"fcmp.sgt.d",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c220000, 0xffff8018,	"fcmp.ceq.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c228000, 0xffff8018,	"fcmp.seq.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c230000, 0xffff8018,	"fcmp.cle.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c238000, 0xffff8018,	"fcmp.sle.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c238000, 0xffff8018,	"fcmp.sge.d",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c240000, 0xffff8018,	"fcmp.cun.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c248000, 0xffff8018,	"fcmp.sun.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c250000, 0xffff8018,	"fcmp.cult.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c250000, 0xffff8018,	"fcmp.cugt.d",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c258000, 0xffff8018,	"fcmp.sult.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c260000, 0xffff8018,	"fcmp.cueq.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c268000, 0xffff8018,	"fcmp.sueq.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c270000, 0xffff8018,	"fcmp.cule.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c270000, 0xffff8018,	"fcmp.cuge.d",	"c0:3,f10:5,f5:5",		0,			0,	0,	0 },
-  { 0x0c278000, 0xffff8018,	"fcmp.sule.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c280000, 0xffff8018,	"fcmp.cne.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c288000, 0xffff8018,	"fcmp.sne.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c2a0000, 0xffff8018,	"fcmp.cor.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c2a8000, 0xffff8018,	"fcmp.sor.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c2c0000, 0xffff8018,	"fcmp.cune.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0x0c2c8000, 0xffff8018,	"fcmp.sune.d",	"c0:3,f5:5,f10:5",		0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
+static struct loongarch_opcode loongarch_fix_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0, 0, "sc.q", "r,r,r,u0:0", "sc.q %1,%2,%3", 0, 0, 0},
+{0x38570000, 0xffff8000, "sc.q", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "llacq.w", "r,r,u0:0", "llacq.w %1,%2", 0, 0, 0},
+{0x38578000, 0xfffffc00, "llacq.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0, 0, "llacq.d", "r,r,u0:0", "llacq.d %1,%2", 0, 0, 0},
+{0x38578800, 0xfffffc00, "llacq.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0, 0, "screl.w", "r,r,u0:0", "screl.w %1,%2", 0, 0, 0},
+{0x38578400, 0xfffffc00, "screl.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0, 0, "screl.d", "r,r,u0:0", "screl.d %1,%2", 0, 0, 0},
+{0x38578c00, 0xfffffc00, "screl.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00001000, 0xfffffc00, "clo.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00001400, 0xfffffc00, "clz.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00001800, 0xfffffc00, "cto.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00001c00, 0xfffffc00, "ctz.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00002000, 0xfffffc00, "clo.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00002400, 0xfffffc00, "clz.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00002800, 0xfffffc00, "cto.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00002c00, 0xfffffc00, "ctz.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00003000, 0xfffffc00, "revb.2h", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00003400, 0xfffffc00, "revb.4h", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00003800, 0xfffffc00, "revb.2w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00003c00, 0xfffffc00, "revb.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00004000, 0xfffffc00, "revh.2w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00004400, 0xfffffc00, "revh.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00004800, 0xfffffc00, "bitrev.4b", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00004c00, 0xfffffc00, "bitrev.8b", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00005000, 0xfffffc00, "bitrev.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00005400, 0xfffffc00, "bitrev.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00005800, 0xfffffc00, "ext.w.h", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00005c00, 0xfffffc00, "ext.w.b", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00006000, 0xfffffc00, "rdtimel.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00006400, 0xfffffc00, "rdtimeh.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00006800, 0xfffffc00, "rdtime.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00006c00, 0xfffffc00, "cpucfg", "r0:5,r5:5", 0, 0, 0, 0},
+{0x00010000, 0xffff801f, "asrtle.d", "r5:5,r10:5", 0, 0, 0, 0},
+{0x00018000, 0xffff801f, "asrtgt.d", "r5:5,r10:5", 0, 0, 0, 0},
+{0x00040000, 0xfffe0000, "alsl.w", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0},
+{0x00060000, 0xfffe0000, "alsl.wu", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0},
+{0x00080000, 0xfffe0000, "bytepick.w", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0},
+{0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0},
+{0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00118000, 0xffff8000, "sub.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00120000, 0xffff8000, "slt", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00128000, 0xffff8000, "sltu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00130000, 0xffff8000, "maskeqz", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00138000, 0xffff8000, "masknez", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00140000, 0xffff8000, "nor", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00148000, 0xffff8000, "and", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0/* or %1,%2,$r0 */, 0, 0, 0},
+{0x00150000, 0xffff8000, "or", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00158000, 0xffff8000, "xor", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00160000, 0xffff8000, "orn", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00168000, 0xffff8000, "andn", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00170000, 0xffff8000, "sll.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00178000, 0xffff8000, "srl.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00180000, 0xffff8000, "sra.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00188000, 0xffff8000, "sll.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00190000, 0xffff8000, "srl.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00198000, 0xffff8000, "sra.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001b0000, 0xffff8000, "rotr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001b8000, 0xffff8000, "rotr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001c0000, 0xffff8000, "mul.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001c8000, 0xffff8000, "mulh.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001d0000, 0xffff8000, "mulh.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001d8000, 0xffff8000, "mul.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001e0000, 0xffff8000, "mulh.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001e8000, 0xffff8000, "mulh.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001f0000, 0xffff8000, "mulw.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x001f8000, 0xffff8000, "mulw.d.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00200000, 0xffff8000, "div.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00208000, 0xffff8000, "mod.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00210000, 0xffff8000, "div.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00218000, 0xffff8000, "mod.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00220000, 0xffff8000, "div.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00228000, 0xffff8000, "mod.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00230000, 0xffff8000, "div.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00238000, 0xffff8000, "mod.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00240000, 0xffff8000, "crc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00248000, 0xffff8000, "crc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00250000, 0xffff8000, "crc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00258000, 0xffff8000, "crc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00260000, 0xffff8000, "crcc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00268000, 0xffff8000, "crcc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00270000, 0xffff8000, "crcc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x00278000, 0xffff8000, "crcc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x002a0000, 0xffff8000, "break", "u0:15", 0, 0, 0, 0},
+{0x002a8000, 0xffff8000, "dbcl", "u0:15", 0, 0, 0, 0},
+{0x002b0000, 0xffff8000, "syscall", "u0:15", 0, 0, 0, 0},
+{0x002c0000, 0xfffe0000, "alsl.d", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0},
+{0x00408000, 0xffff8000, "slli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0},
+{0x00410000, 0xffff0000, "slli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0},
+{0x00448000, 0xffff8000, "srli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0},
+{0x00450000, 0xffff0000, "srli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0},
+{0x00488000, 0xffff8000, "srai.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0},
+{0x00490000, 0xffff0000, "srai.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0},
+{0x004c8000, 0xffff8000, "rotri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0},
+{0x004d0000, 0xffff0000, "rotri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0},
+{0x00600000, 0xffe08000, "bstrins.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0},
+{0x00608000, 0xffe08000, "bstrpick.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0},
+{0x00800000, 0xffc00000, "bstrins.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0},
+{0x00c00000, 0xffc00000, "bstrpick.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_load_store_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x20000000, 0xff000000,	"ll.w",		"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x21000000, 0xff000000,	"sc.w",		"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x22000000, 0xff000000,	"ll.d",		"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x23000000, 0xff000000,	"sc.d",		"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x24000000, 0xff000000,	"ldptr.w",	"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x25000000, 0xff000000,	"stptr.w",	"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x26000000, 0xff000000,	"ldptr.d",	"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x27000000, 0xff000000,	"stptr.d",	"r0:5,r5:5,s10:14<<2",		0,			0,	0,	0 },
-  { 0x28000000, 0xffc00000,	"ld.b",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x28400000, 0xffc00000,	"ld.h",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x28800000, 0xffc00000,	"ld.w",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x28c00000, 0xffc00000,	"ld.d",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x29000000, 0xffc00000,	"st.b",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x29400000, 0xffc00000,	"st.h",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x29800000, 0xffc00000,	"st.w",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x29c00000, 0xffc00000,	"st.d",		"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x2a000000, 0xffc00000,	"ld.bu",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x2a400000, 0xffc00000,	"ld.hu",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x2a800000, 0xffc00000,	"ld.wu",	"r0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x2ac00000, 0xffc00000,	"preld",	"u0:5,r5:5,s10:12",		0,			0,	0,	0 },
-  { 0x38000000, 0xffff8000,	"ldx.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38040000, 0xffff8000,	"ldx.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38080000, 0xffff8000,	"ldx.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x380c0000, 0xffff8000,	"ldx.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38100000, 0xffff8000,	"stx.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38140000, 0xffff8000,	"stx.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38180000, 0xffff8000,	"stx.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x381c0000, 0xffff8000,	"stx.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38200000, 0xffff8000,	"ldx.bu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38240000, 0xffff8000,	"ldx.hu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38280000, 0xffff8000,	"ldx.wu",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x382c0000, 0xffff8000,	"preldx",	"u0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amswap.w",	"r,r,r,u0:0",			"amswap.w %1,%2,%3",	0,	0,	0 },
-  { 0x38600000, 0xffff8000,	"amswap.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amswap.d",	"r,r,r,u0:0",			"amswap.d %1,%2,%3",	0,	0,	0 },
-  { 0x38608000, 0xffff8000,	"amswap.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amadd.w",	"r,r,r,u0:0",			"amadd.w %1,%2,%3",	0,	0,	0 },
-  { 0x38610000, 0xffff8000,	"amadd.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amadd.d",	"r,r,r,u0:0",			"amadd.d %1,%2,%3",	0,	0,	0 },
-  { 0x38618000, 0xffff8000,	"amadd.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amand.w",	"r,r,r,u0:0",			"amand.w %1,%2,%3",	0,	0,	0 },
-  { 0x38620000, 0xffff8000,	"amand.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amand.d",	"r,r,r,u0:0",			"amand.d %1,%2,%3",	0,	0,	0 },
-  { 0x38628000, 0xffff8000,	"amand.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amor.w",	"r,r,r,u0:0",			"amor.w %1,%2,%3",	0,	0,	0 },
-  { 0x38630000, 0xffff8000,	"amor.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amor.d",	"r,r,r,u0:0",			"amor.d %1,%2,%3",	0,	0,	0 },
-  { 0x38638000, 0xffff8000,	"amor.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amxor.w",	"r,r,r,u0:0",			"amxor.w %1,%2,%3",	0,	0,	0 },
-  { 0x38640000, 0xffff8000,	"amxor.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amxor.d",	"r,r,r,u0:0",			"amxor.d %1,%2,%3",	0,	0,	0 },
-  { 0x38648000, 0xffff8000,	"amxor.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax.w",	"r,r,r,u0:0",			"ammax.w %1,%2,%3",	0,	0,	0 },
-  { 0x38650000, 0xffff8000,	"ammax.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax.d",	"r,r,r,u0:0",			"ammax.d %1,%2,%3",	0,	0,	0 },
-  { 0x38658000, 0xffff8000,	"ammax.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin.w",	"r,r,r,u0:0",			"ammin.w %1,%2,%3",	0,	0,	0 },
-  { 0x38660000, 0xffff8000,	"ammin.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin.d",	"r,r,r,u0:0",			"ammin.d %1,%2,%3",	0,	0,	0 },
-  { 0x38668000, 0xffff8000,	"ammin.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax.wu",	"r,r,r,u0:0",			"ammax.wu %1,%2,%3",	0,	0,	0 },
-  { 0x38670000, 0xffff8000,	"ammax.wu",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax.du",	"r,r,r,u0:0",			"ammax.du %1,%2,%3",	0,	0,	0 },
-  { 0x38678000, 0xffff8000,	"ammax.du",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin.wu",	"r,r,r,u0:0",			"ammin.wu %1,%2,%3",	0,	0,	0 },
-  { 0x38680000, 0xffff8000,	"ammin.wu",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin.du",	"r,r,r,u0:0",			"ammin.du %1,%2,%3",	0,	0,	0 },
-  { 0x38688000, 0xffff8000,	"ammin.du",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amswap_db.w",	"r,r,r,u0:0",			"amswap_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x38690000, 0xffff8000,	"amswap_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amswap_db.d",	"r,r,r,u0:0",			"amswap_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x38698000, 0xffff8000,	"amswap_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amadd_db.w",	"r,r,r,u0:0",			"amadd_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386a0000, 0xffff8000,	"amadd_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amadd_db.d",	"r,r,r,u0:0",			"amadd_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386a8000, 0xffff8000,	"amadd_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amand_db.w",	"r,r,r,u0:0",			"amand_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386b0000, 0xffff8000,	"amand_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amand_db.d",	"r,r,r,u0:0",			"amand_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386b8000, 0xffff8000,	"amand_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amor_db.w",	"r,r,r,u0:0",			"amor_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386c0000, 0xffff8000,	"amor_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amor_db.d",	"r,r,r,u0:0",			"amor_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386c8000, 0xffff8000,	"amor_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amxor_db.w",	"r,r,r,u0:0",			"amxor_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386d0000, 0xffff8000,	"amxor_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"amxor_db.d",	"r,r,r,u0:0",			"amxor_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386d8000, 0xffff8000,	"amxor_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax_db.w",	"r,r,r,u0:0",			"ammax_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386e0000, 0xffff8000,	"ammax_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax_db.d",	"r,r,r,u0:0",			"ammax_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386e8000, 0xffff8000,	"ammax_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin_db.w",	"r,r,r,u0:0",			"ammin_db.w %1,%2,%3",	0,	0,	0 },
-  { 0x386f0000, 0xffff8000,	"ammin_db.w",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin_db.d",	"r,r,r,u0:0",			"ammin_db.d %1,%2,%3",	0,	0,	0 },
-  { 0x386f8000, 0xffff8000,	"ammin_db.d",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax_db.wu",	"r,r,r,u0:0",			"ammax_db.wu %1,%2,%3",	0,	0,	0 },
-  { 0x38700000, 0xffff8000,	"ammax_db.wu",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammax_db.du",	"r,r,r,u0:0",			"ammax_db.du %1,%2,%3",	0,	0,	0 },
-  { 0x38708000, 0xffff8000,	"ammax_db.du",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin_db.wu",	"r,r,r,u0:0",			"ammin_db.wu %1,%2,%3",	0,	0,	0 },
-  { 0x38710000, 0xffff8000,	"ammin_db.wu",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x0,	0x0,		"ammin_db.du",	"r,r,r,u0:0",			"ammin_db.du %1,%2,%3",	0,	0,	0 },
-  { 0x38718000, 0xffff8000,	"ammin_db.du",	"r0:5,r10:5,r5:5",		0,			0,	0,	0 },
-  { 0x38720000, 0xffff8000,	"dbar",		"u0:15",			0,			0,	0,	0 },
-  { 0x38728000, 0xffff8000,	"ibar",		"u0:15",			0,			0,	0,	0 },
-  { 0x38780000, 0xffff8000,	"ldgt.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38788000, 0xffff8000,	"ldgt.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38790000, 0xffff8000,	"ldgt.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x38798000, 0xffff8000,	"ldgt.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387a0000, 0xffff8000,	"ldle.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387a8000, 0xffff8000,	"ldle.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387b0000, 0xffff8000,	"ldle.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387b8000, 0xffff8000,	"ldle.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387c0000, 0xffff8000,	"stgt.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387c8000, 0xffff8000,	"stgt.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387d0000, 0xffff8000,	"stgt.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387d8000, 0xffff8000,	"stgt.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387e0000, 0xffff8000,	"stle.b",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387e8000, 0xffff8000,	"stle.h",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387f0000, 0xffff8000,	"stle.w",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0x387f8000, 0xffff8000,	"stle.d",	"r0:5,r5:5,r10:5",		0,			0,	0,	0 },
-  { 0 } /* Terminate the list.  */
+static struct loongarch_opcode loongarch_float_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x01147400, 0xfffffc00, "frecipe.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01147800, 0xfffffc00, "frecipe.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01148400, 0xfffffc00, "frsqrte.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01148800, 0xfffffc00, "frsqrte.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01008000, 0xffff8000, "fadd.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01010000, 0xffff8000, "fadd.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01028000, 0xffff8000, "fsub.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01030000, 0xffff8000, "fsub.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01048000, 0xffff8000, "fmul.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01050000, 0xffff8000, "fmul.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01068000, 0xffff8000, "fdiv.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01070000, 0xffff8000, "fdiv.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01088000, 0xffff8000, "fmax.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01090000, 0xffff8000, "fmax.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010a8000, 0xffff8000, "fmin.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010b0000, 0xffff8000, "fmin.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010c8000, 0xffff8000, "fmaxa.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010d0000, 0xffff8000, "fmaxa.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010e8000, 0xffff8000, "fmina.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x010f0000, 0xffff8000, "fmina.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01108000, 0xffff8000, "fscaleb.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01110000, 0xffff8000, "fscaleb.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01128000, 0xffff8000, "fcopysign.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01130000, 0xffff8000, "fcopysign.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0},
+{0x01140400, 0xfffffc00, "fabs.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01140800, 0xfffffc00, "fabs.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01141400, 0xfffffc00, "fneg.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01141800, 0xfffffc00, "fneg.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01142400, 0xfffffc00, "flogb.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01142800, 0xfffffc00, "flogb.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01143400, 0xfffffc00, "fclass.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01143800, 0xfffffc00, "fclass.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01144400, 0xfffffc00, "fsqrt.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01144800, 0xfffffc00, "fsqrt.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01145400, 0xfffffc00, "frecip.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01145800, 0xfffffc00, "frecip.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01146400, 0xfffffc00, "frsqrt.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01146800, 0xfffffc00, "frsqrt.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01149400, 0xfffffc00, "fmov.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01149800, 0xfffffc00, "fmov.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x0114a400, 0xfffffc00, "movgr2fr.w", "f0:5,r5:5", 0, 0, 0, 0},
+{0x0114a800, 0xfffffc00, "movgr2fr.d", "f0:5,r5:5", 0, 0, 0, 0},
+{0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0},
+{0x0114b400, 0xfffffc00, "movfr2gr.s", "r0:5,f5:5", 0, 0, 0, 0},
+{0x0114b800, 0xfffffc00, "movfr2gr.d", "r0:5,f5:5", 0, 0, 0, 0},
+{0x0114bc00, 0xfffffc00, "movfrh2gr.s", "r0:5,f5:5", 0, 0, 0, 0},
+{0x0114c000, 0xfffffc00, "movgr2fcsr", "r0:5,r5:5", 0, 0, 0, 0},
+{0x0114c800, 0xfffffc00, "movfcsr2gr", "r0:5,r5:5", 0, 0, 0, 0},
+{0x0114d000, 0xfffffc18, "movfr2cf", "c0:3,f5:5", 0, 0, 0, 0},
+{0x0114d400, 0xffffff00, "movcf2fr", "f0:5,c5:3", 0, 0, 0, 0},
+{0x0114d800, 0xfffffc18, "movgr2cf", "c0:3,r5:5", 0, 0, 0, 0},
+{0x0114dc00, 0xffffff00, "movcf2gr", "r0:5,c5:3", 0, 0, 0, 0},
+{0x01191800, 0xfffffc00, "fcvt.s.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x01192400, 0xfffffc00, "fcvt.d.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a0400, 0xfffffc00, "ftintrm.w.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a0800, 0xfffffc00, "ftintrm.w.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a2400, 0xfffffc00, "ftintrm.l.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a2800, 0xfffffc00, "ftintrm.l.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a4400, 0xfffffc00, "ftintrp.w.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a4800, 0xfffffc00, "ftintrp.w.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a6400, 0xfffffc00, "ftintrp.l.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a6800, 0xfffffc00, "ftintrp.l.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a8400, 0xfffffc00, "ftintrz.w.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011a8800, 0xfffffc00, "ftintrz.w.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011aa400, 0xfffffc00, "ftintrz.l.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011aa800, 0xfffffc00, "ftintrz.l.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011ac400, 0xfffffc00, "ftintrne.w.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011ac800, 0xfffffc00, "ftintrne.w.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011ae400, 0xfffffc00, "ftintrne.l.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011ae800, 0xfffffc00, "ftintrne.l.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011b0400, 0xfffffc00, "ftint.w.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011b0800, 0xfffffc00, "ftint.w.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011b2400, 0xfffffc00, "ftint.l.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011b2800, 0xfffffc00, "ftint.l.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011d1000, 0xfffffc00, "ffint.s.w", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011d1800, 0xfffffc00, "ffint.s.l", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011d2000, 0xfffffc00, "ffint.d.w", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011d2800, 0xfffffc00, "ffint.d.l", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011e4400, 0xfffffc00, "frint.s", "f0:5,f5:5", 0, 0, 0, 0},
+{0x011e4800, 0xfffffc00, "frint.d", "f0:5,f5:5", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,	include,		exclude, pinfo.  */
-  { 0x2b000000, 0xffc00000,	"fld.s",	"f0:5,r5:5,s10:12",		0,	0,			0,	0 },
-  { 0x2b400000, 0xffc00000,	"fst.s",	"f0:5,r5:5,s10:12",		0,	0,			0,	0 },
-  { 0x38300000, 0xffff8000,	"fldx.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38380000, 0xffff8000,	"fstx.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38740000, 0xffff8000,	"fldgt.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38750000, 0xffff8000,	"fldle.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38760000, 0xffff8000,	"fstgt.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38770000, 0xffff8000,	"fstle.s",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0 } /* Terminate the list.  */
+static struct loongarch_opcode loongarch_lmm_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x02000000, 0xffc00000, "slti", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x02400000, 0xffc00000, "sltui", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x02800000, 0xffc00000, "addi.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x02c00000, 0xffc00000, "addi.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x03000000, 0xffc00000, "lu52i.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0, 0, "nop", "", "andi $r0,$r0,0", 0, 0, 0},
+{0x03400000, 0xffc00000, "andi", "r0:5,r5:5,u10:12", 0, 0, 0, 0},
+{0x03800000, 0xffc00000, "ori", "r0:5,r5:5,u10:12", 0, 0, 0, 0},
+{0x03c00000, 0xffc00000, "xori", "r0:5,r5:5,u10:12", 0, 0, 0, 0},
+{0x10000000, 0xfc000000, "addu16i.d", "r0:5,r5:5,s10:16", 0, 0, 0, 0},
+{0x14000000, 0xfe000000, "lu12i.w", "r0:5,s5:20", 0, 0, 0, 0},
+{0x16000000, 0xfe000000, "lu32i.d", "r0:5,s5:20", 0, 0, 0, 0},
+{0x18000000, 0xfe000000, "pcaddi", "r0:5,s5:20", 0, 0, 0, 0},
+{0x1a000000, 0xfe000000, "pcalau12i", "r0:5,s5:20", 0, 0, 0, 0},
+{0x1c000000, 0xfe000000, "pcaddu12i", "r0:5,s5:20", 0, 0, 0, 0},
+{0x1e000000, 0xfe000000, "pcaddu18i", "r0:5,s5:20", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,	include,		exclude, pinfo.  */
-  { 0x2b800000, 0xffc00000,	"fld.d",	"f0:5,r5:5,s10:12",		0,	0,			0,	0 },
-  { 0x2bc00000, 0xffc00000,	"fst.d",	"f0:5,r5:5,s10:12",		0,	0,			0,	0 },
-  { 0x38340000, 0xffff8000,	"fldx.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x383c0000, 0xffff8000,	"fstx.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38748000, 0xffff8000,	"fldgt.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38758000, 0xffff8000,	"fldle.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38768000, 0xffff8000,	"fstgt.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0x38778000, 0xffff8000,	"fstle.d",	"f0:5,r5:5,r10:5",		0,	0,	0,	0 },
-  { 0 } /* Terminate the list.  */
+static struct loongarch_opcode loongarch_privilege_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x04000000, 0xff0003e0, "csrrd", "r0:5,u10:14", 0, 0, 0, 0},
+{0x04000020, 0xff0003e0, "csrwr", "r0:5,u10:14", 0, 0, 0, 0},
+{0x04000000, 0xff000000, "csrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0},
+{0x06000000, 0xffc00000, "cacop", "u0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x06400000, 0xfffc0000, "lddir", "r0:5,r5:5,u10:8", 0, 0, 0, 0},
+{0x06440000, 0xfffc001f, "ldpte", "r5:5,u10:8", 0, 0, 0, 0},
+{0x06480000, 0xfffffc00, "iocsrrd.b", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06480400, 0xfffffc00, "iocsrrd.h", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06480800, 0xfffffc00, "iocsrrd.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06480c00, 0xfffffc00, "iocsrrd.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06481000, 0xfffffc00, "iocsrwr.b", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06481400, 0xfffffc00, "iocsrwr.h", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06481800, 0xfffffc00, "iocsrwr.w", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06481c00, 0xfffffc00, "iocsrwr.d", "r0:5,r5:5", 0, 0, 0, 0},
+{0x06482000, 0xffffffff, "tlbclr", "", 0, 0, 0, 0},
+{0x06482400, 0xffffffff, "tlbflush", "", 0, 0, 0, 0},
+{0x06482800, 0xffffffff, "tlbsrch", "", 0, 0, 0, 0},
+{0x06482c00, 0xffffffff, "tlbrd", "", 0, 0, 0, 0},
+{0x06483000, 0xffffffff, "tlbwr", "", 0, 0, 0, 0},
+{0x06483400, 0xffffffff, "tlbfill", "", 0, 0, 0, 0},
+{0x06483800, 0xffffffff, "ertn", "", 0, 0, 0, 0},
+{0x06488000, 0xffff8000, "idle", "u0:15", 0, 0, 0, 0},
+{0x06498000, 0xffff8000, "invtlb", "u0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_float_jmp_opcodes[] =
-{
-  { 0x0,	0x0,		"bceqz",	"c,la",				"bceqz %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x48000000, 0xfc000300,	"bceqz",	"c5:3,sb0:5|10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bcnez",	"c,la",				"bcnez %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x48000100, 0xfc000300,	"bcnez",	"c5:3,sb0:5|10:16<<2",		0,				0, 0, 0 },
-  { 0 } /* Terminate the list.  */
+static struct loongarch_opcode loongarch_4opt_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08200000, 0xfff00000, "fmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08600000, 0xfff00000, "fmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08a00000, 0xfff00000, "fnmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x08e00000, 0xfff00000, "fnmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0},
+{0x09100000, 0xfff00000, "vfmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09200000, 0xfff00000, "vfmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09500000, 0xfff00000, "vfmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09600000, 0xfff00000, "vfmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09900000, 0xfff00000, "vfnmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09a00000, 0xfff00000, "vfnmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09d00000, 0xfff00000, "vfnmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x09e00000, 0xfff00000, "vfnmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x0a100000, 0xfff00000, "xvfmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0a200000, 0xfff00000, "xvfmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0a500000, 0xfff00000, "xvfmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0a600000, 0xfff00000, "xvfmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0a900000, 0xfff00000, "xvfnmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0aa00000, 0xfff00000, "xvfnmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0ad00000, 0xfff00000, "xvfnmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0ae00000, 0xfff00000, "xvfnmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c200000, 0xffff8018, "fcmp.caf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c208000, 0xffff8018, "fcmp.saf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c210000, 0xffff8018, "fcmp.clt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c218000, 0xffff8018, "fcmp.slt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c218000, 0xffff8018, "fcmp.sgt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c220000, 0xffff8018, "fcmp.ceq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c228000, 0xffff8018, "fcmp.seq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c230000, 0xffff8018, "fcmp.cle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c238000, 0xffff8018, "fcmp.sle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c238000, 0xffff8018, "fcmp.sge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c240000, 0xffff8018, "fcmp.cun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c248000, 0xffff8018, "fcmp.sun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c250000, 0xffff8018, "fcmp.cult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c250000, 0xffff8018, "fcmp.cugt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c258000, 0xffff8018, "fcmp.sult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c260000, 0xffff8018, "fcmp.cueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c268000, 0xffff8018, "fcmp.sueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c270000, 0xffff8018, "fcmp.cule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c270000, 0xffff8018, "fcmp.cuge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0},
+{0x0c278000, 0xffff8018, "fcmp.sule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c280000, 0xffff8018, "fcmp.cne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c288000, 0xffff8018, "fcmp.sne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c2a0000, 0xffff8018, "fcmp.cor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c2a8000, 0xffff8018, "fcmp.sor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c2c0000, 0xffff8018, "fcmp.cune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c2c8000, 0xffff8018, "fcmp.sune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0},
+{0x0c500000, 0xffff8000, "vfcmp.caf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c508000, 0xffff8000, "vfcmp.saf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c510000, 0xffff8000, "vfcmp.clt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c518000, 0xffff8000, "vfcmp.slt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c520000, 0xffff8000, "vfcmp.ceq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c528000, 0xffff8000, "vfcmp.seq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c530000, 0xffff8000, "vfcmp.cle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c538000, 0xffff8000, "vfcmp.sle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c540000, 0xffff8000, "vfcmp.cun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c548000, 0xffff8000, "vfcmp.sun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c550000, 0xffff8000, "vfcmp.cult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c558000, 0xffff8000, "vfcmp.sult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c560000, 0xffff8000, "vfcmp.cueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c568000, 0xffff8000, "vfcmp.sueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c570000, 0xffff8000, "vfcmp.cule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c578000, 0xffff8000, "vfcmp.sule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c580000, 0xffff8000, "vfcmp.cne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c588000, 0xffff8000, "vfcmp.sne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c5a0000, 0xffff8000, "vfcmp.cor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c5a8000, 0xffff8000, "vfcmp.sor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c5c0000, 0xffff8000, "vfcmp.cune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c5c8000, 0xffff8000, "vfcmp.sune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c600000, 0xffff8000, "vfcmp.caf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c608000, 0xffff8000, "vfcmp.saf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c610000, 0xffff8000, "vfcmp.clt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c618000, 0xffff8000, "vfcmp.slt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c620000, 0xffff8000, "vfcmp.ceq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c628000, 0xffff8000, "vfcmp.seq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c630000, 0xffff8000, "vfcmp.cle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c638000, 0xffff8000, "vfcmp.sle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c640000, 0xffff8000, "vfcmp.cun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c648000, 0xffff8000, "vfcmp.sun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c650000, 0xffff8000, "vfcmp.cult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c658000, 0xffff8000, "vfcmp.sult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c660000, 0xffff8000, "vfcmp.cueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c668000, 0xffff8000, "vfcmp.sueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c670000, 0xffff8000, "vfcmp.cule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c678000, 0xffff8000, "vfcmp.sule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c680000, 0xffff8000, "vfcmp.cne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c688000, 0xffff8000, "vfcmp.sne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c6a0000, 0xffff8000, "vfcmp.cor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c6a8000, 0xffff8000, "vfcmp.sor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c6c0000, 0xffff8000, "vfcmp.cune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c6c8000, 0xffff8000, "vfcmp.sune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
+{0x0c900000, 0xffff8000, "xvfcmp.caf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c908000, 0xffff8000, "xvfcmp.saf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c910000, 0xffff8000, "xvfcmp.clt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c918000, 0xffff8000, "xvfcmp.slt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c920000, 0xffff8000, "xvfcmp.ceq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c928000, 0xffff8000, "xvfcmp.seq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c930000, 0xffff8000, "xvfcmp.cle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c938000, 0xffff8000, "xvfcmp.sle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c940000, 0xffff8000, "xvfcmp.cun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c948000, 0xffff8000, "xvfcmp.sun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c950000, 0xffff8000, "xvfcmp.cult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c958000, 0xffff8000, "xvfcmp.sult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c960000, 0xffff8000, "xvfcmp.cueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c968000, 0xffff8000, "xvfcmp.sueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c970000, 0xffff8000, "xvfcmp.cule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c978000, 0xffff8000, "xvfcmp.sule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c980000, 0xffff8000, "xvfcmp.cne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c988000, 0xffff8000, "xvfcmp.sne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c9a0000, 0xffff8000, "xvfcmp.cor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c9a8000, 0xffff8000, "xvfcmp.sor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c9c0000, 0xffff8000, "xvfcmp.cune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0c9c8000, 0xffff8000, "xvfcmp.sune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca00000, 0xffff8000, "xvfcmp.caf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca08000, 0xffff8000, "xvfcmp.saf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca10000, 0xffff8000, "xvfcmp.clt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca18000, 0xffff8000, "xvfcmp.slt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca20000, 0xffff8000, "xvfcmp.ceq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca28000, 0xffff8000, "xvfcmp.seq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca30000, 0xffff8000, "xvfcmp.cle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca38000, 0xffff8000, "xvfcmp.sle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca40000, 0xffff8000, "xvfcmp.cun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca48000, 0xffff8000, "xvfcmp.sun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca50000, 0xffff8000, "xvfcmp.cult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca58000, 0xffff8000, "xvfcmp.sult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca60000, 0xffff8000, "xvfcmp.cueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca68000, 0xffff8000, "xvfcmp.sueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca70000, 0xffff8000, "xvfcmp.cule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca78000, 0xffff8000, "xvfcmp.sule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca80000, 0xffff8000, "xvfcmp.cne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0ca88000, 0xffff8000, "xvfcmp.sne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0caa0000, 0xffff8000, "xvfcmp.cor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0caa8000, 0xffff8000, "xvfcmp.sor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0cac0000, 0xffff8000, "xvfcmp.cune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0cac8000, 0xffff8000, "xvfcmp.sune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
+{0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0},
+{0x0d100000, 0xfff00000, "vbitsel.v", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x0d200000, 0xfff00000, "xvbitsel.v", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0x0d500000, 0xfff00000, "vshuf.b", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0},
+{0x0d600000, 0xfff00000, "xvshuf.b", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
 };
 
-static struct loongarch_opcode loongarch_jmp_opcodes[] =
-{
-  /* match,	mask,		name,		format,				macro,			include, exclude, pinfo.  */
-  { 0x0,	0x0,		"bltz",		"r,la",				"bltz %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x60000000, 0xfc00001f,	"bltz",		"r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bgtz",		"r,la",				"bgtz %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x60000000, 0xfc0003e0,	"bgtz",		"r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bgez",		"r,la",				"bgez %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x64000000, 0xfc00001f,	"bgez",		"r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"blez",		"r,la",				"blez %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x64000000, 0xfc0003e0,	"blez",		"r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"beqz",		"r,la",				"beqz %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x40000000, 0xfc000000,	"beqz",		"r5:5,sb0:5|10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bnez",		"r,la",				"bnez %1,%%pcrel(%2)",		0, 0, 0 },
-  { 0x44000000, 0xfc000000,	"bnez",		"r5:5,sb0:5|10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"jr",		"r",				"jirl $r0,%1,0",		0, 0, 0 },
-  { 0x50000000, 0xfc000000,	"b",		"sb0:10|10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"b",		"la",				"b %%pcrel(%1)",		0, 0, 0 },
-  { 0x4c000000, 0xfc000000,	"jirl",		"r0:5,r5:5,s10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bl",		"la",				"bl %%pcrel(%1)",		0, 0, 0 },
-  { 0x54000000, 0xfc000000,	"bl",		"sb0:10|10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"beq",		"r,r,la",			"beq %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x58000000, 0xfc000000,	"beq",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bne",		"r,r,la",			"bne %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x5c000000, 0xfc000000,	"bne",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"blt",		"r,r,la",			"blt %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x60000000, 0xfc000000,	"blt",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bgt",		"r,r,la",			"bgt %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x60000000, 0xfc000000,	"bgt",		"r0:5,r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bge",		"r,r,la",			"bge %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x64000000, 0xfc000000,	"bge",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"ble",		"r,r,la",			"ble %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x64000000, 0xfc000000,	"ble",		"r0:5,r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bltu",		"r,r,la",			"bltu %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x68000000, 0xfc000000,	"bltu",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bgtu",		"r,r,la",			"bgtu %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x68000000, 0xfc000000,	"bgtu",		"r0:5,r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bgeu",		"r,r,la",			"bgeu %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x6c000000, 0xfc000000,	"bgeu",		"r5:5,r0:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0x0,	0x0,		"bleu",		"r,r,la",			"bleu %1,%2,%%pcrel(%3)",	0, 0, 0 },
-  { 0x6c000000, 0xfc000000,	"bleu",		"r0:5,r5:5,sb10:16<<2",		0,				0, 0, 0 },
-  { 0 } /* Terminate the list.  */
-};
-static struct loongarch_opcode loongarch_128vec_opcodes[] = {
+static struct loongarch_opcode loongarch_load_store_opcodes[] = {
 /* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0},
+{0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0},
 {0x2c000000, 0xffc00000, "vld", "v0:5,r5:5,s10:12", 0, 0, 0, 0},
 {0x2c400000, 0xffc00000, "vst", "v0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2c800000, 0xffc00000, "xvld", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x2cc00000, 0xffc00000, "xvst", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
 {0x30100000, 0xfff80000, "vldrepl.d", "v0:5,r5:5,s10:9<<3", 0, 0, 0, 0},
 {0x30200000, 0xfff00000, "vldrepl.w", "v0:5,r5:5,s10:10<<2", 0, 0, 0, 0},
 {0x30400000, 0xffe00000, "vldrepl.h", "v0:5,r5:5,s10:11<<1", 0, 0, 0, 0},
@@ -788,8 +711,220 @@ static struct loongarch_opcode loongarch_128vec_opcodes[] = {
 {0x31200000, 0xfff00000, "vstelm.w", "v0:5,r5:5,s10:8<<2,u18:2", 0, 0, 0, 0},
 {0x31400000, 0xffe00000, "vstelm.h", "v0:5,r5:5,s10:8<<1,u18:3", 0, 0, 0, 0},
 {0x31800000, 0xffc00000, "vstelm.b", "v0:5,r5:5,s10:8,u18:4", 0, 0, 0, 0},
+{0x32100000, 0xfff80000, "xvldrepl.d", "x0:5,r5:5,s10:9<<3", 0, 0, 0, 0},
+{0x32200000, 0xfff00000, "xvldrepl.w", "x0:5,r5:5,s10:10<<2", 0, 0, 0, 0},
+{0x32400000, 0xffe00000, "xvldrepl.h", "x0:5,r5:5,s10:11<<1", 0, 0, 0, 0},
+{0x32800000, 0xffc00000, "xvldrepl.b", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
+{0x33100000, 0xfff00000, "xvstelm.d", "x0:5,r5:5,s10:8<<3,u18:2", 0, 0, 0, 0},
+{0x33200000, 0xffe00000, "xvstelm.w", "x0:5,r5:5,s10:8<<2,u18:3", 0, 0, 0, 0},
+{0x33400000, 0xffc00000, "xvstelm.h", "x0:5,r5:5,s10:8<<1,u18:4", 0, 0, 0, 0},
+{0x33800000, 0xff800000, "xvstelm.b", "x0:5,r5:5,s10:8,u18:5", 0, 0, 0, 0},
+{0x38000000, 0xffff8000, "ldx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38040000, 0xffff8000, "ldx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38080000, 0xffff8000, "ldx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x380c0000, 0xffff8000, "ldx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38100000, 0xffff8000, "stx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38140000, 0xffff8000, "stx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38180000, 0xffff8000, "stx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x381c0000, 0xffff8000, "stx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38200000, 0xffff8000, "ldx.bu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38300000, 0xffff8000, "fldx.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38340000, 0xffff8000, "fldx.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38380000, 0xffff8000, "fstx.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x383c0000, 0xffff8000, "fstx.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
 {0x38400000, 0xffff8000, "vldx", "v0:5,r5:5,r10:5", 0, 0, 0, 0},
 {0x38440000, 0xffff8000, "vstx", "v0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38480000, 0xffff8000, "xvldx", "x0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x384c0000, 0xffff8000, "xvstx", "x0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0, 0, "amcas.b", "r,r,r,u0:0", "amcas.b %1,%2,%3", 0, 0, 0},
+{0x38580000, 0xffff8000, "amcas.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas.h", "r,r,r,u0:0", "amcas.h %1,%2,%3", 0, 0, 0},
+{0x38588000, 0xffff8000, "amcas.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas.w", "r,r,r,u0:0", "amcas.w %1,%2,%3", 0, 0, 0},
+{0x38590000, 0xffff8000, "amcas.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas.d", "r,r,r,u0:0", "amcas.d %1,%2,%3", 0, 0, 0},
+{0x38598000, 0xffff8000, "amcas.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas_db.b", "r,r,r,u0:0", "amcas_db.b %1,%2,%3", 0, 0, 0},
+{0x385a0000, 0xffff8000, "amcas_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas_db.h", "r,r,r,u0:0", "amcas_db.h %1,%2,%3", 0, 0, 0},
+{0x385a8000, 0xffff8000, "amcas_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas_db.w", "r,r,r,u0:0", "amcas_db.w %1,%2,%3", 0, 0, 0},
+{0x385b0000, 0xffff8000, "amcas_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amcas_db.d", "r,r,r,u0:0", "amcas_db.d %1,%2,%3", 0, 0, 0},
+{0x385b8000, 0xffff8000, "amcas_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap.b", "r,r,r,u0:0", "amswap.b %1,%2,%3", 0, 0, 0},
+{0x385c0000, 0xffff8000, "amswap.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap.h", "r,r,r,u0:0", "amswap.h %1,%2,%3", 0, 0, 0},
+{0x385c8000, 0xffff8000, "amswap.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd.b", "r,r,r,u0:0", "amadd.b %1,%2,%3", 0, 0, 0},
+{0x385d0000, 0xffff8000, "amadd.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd.h", "r,r,r,u0:0", "amadd.h %1,%2,%3", 0, 0, 0},
+{0x385d8000, 0xffff8000, "amadd.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap_db.b", "r,r,r,u0:0", "amswap_db.b %1,%2,%3", 0, 0, 0},
+{0x385e0000, 0xffff8000, "amswap_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap_db.h", "r,r,r,u0:0", "amswap_db.h %1,%2,%3", 0, 0, 0},
+{0x385e8000, 0xffff8000, "amswap_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd_db.b", "r,r,r,u0:0", "amadd_db.b %1,%2,%3", 0, 0, 0},
+{0x385f0000, 0xffff8000, "amadd_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd_db.h", "r,r,r,u0:0", "amadd_db.h %1,%2,%3", 0, 0, 0},
+{0x385f8000, 0xffff8000, "amadd_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0},
+{0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0},
+{0x38608000, 0xffff8000, "amswap.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd.w", "r,r,r,u0:0", "amadd.w %1,%2,%3", 0, 0, 0},
+{0x38610000, 0xffff8000, "amadd.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd.d", "r,r,r,u0:0", "amadd.d %1,%2,%3", 0, 0, 0},
+{0x38618000, 0xffff8000, "amadd.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amand.w", "r,r,r,u0:0", "amand.w %1,%2,%3", 0, 0, 0},
+{0x38620000, 0xffff8000, "amand.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amand.d", "r,r,r,u0:0", "amand.d %1,%2,%3", 0, 0, 0},
+{0x38628000, 0xffff8000, "amand.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amor.w", "r,r,r,u0:0", "amor.w %1,%2,%3", 0, 0, 0},
+{0x38630000, 0xffff8000, "amor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amor.d", "r,r,r,u0:0", "amor.d %1,%2,%3", 0, 0, 0},
+{0x38638000, 0xffff8000, "amor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amxor.w", "r,r,r,u0:0", "amxor.w %1,%2,%3", 0, 0, 0},
+{0x38640000, 0xffff8000, "amxor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amxor.d", "r,r,r,u0:0", "amxor.d %1,%2,%3", 0, 0, 0},
+{0x38648000, 0xffff8000, "amxor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax.w", "r,r,r,u0:0", "ammax.w %1,%2,%3", 0, 0, 0},
+{0x38650000, 0xffff8000, "ammax.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax.d", "r,r,r,u0:0", "ammax.d %1,%2,%3", 0, 0, 0},
+{0x38658000, 0xffff8000, "ammax.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin.w", "r,r,r,u0:0", "ammin.w %1,%2,%3", 0, 0, 0},
+{0x38660000, 0xffff8000, "ammin.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin.d", "r,r,r,u0:0", "ammin.d %1,%2,%3", 0, 0, 0},
+{0x38668000, 0xffff8000, "ammin.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax.wu", "r,r,r,u0:0", "ammax.wu %1,%2,%3", 0, 0, 0},
+{0x38670000, 0xffff8000, "ammax.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax.du", "r,r,r,u0:0", "ammax.du %1,%2,%3", 0, 0, 0},
+{0x38678000, 0xffff8000, "ammax.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin.wu", "r,r,r,u0:0", "ammin.wu %1,%2,%3", 0, 0, 0},
+{0x38680000, 0xffff8000, "ammin.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin.du", "r,r,r,u0:0", "ammin.du %1,%2,%3", 0, 0, 0},
+{0x38688000, 0xffff8000, "ammin.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap_db.w", "r,r,r,u0:0", "amswap_db.w %1,%2,%3", 0, 0, 0},
+{0x38690000, 0xffff8000, "amswap_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amswap_db.d", "r,r,r,u0:0", "amswap_db.d %1,%2,%3", 0, 0, 0},
+{0x38698000, 0xffff8000, "amswap_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd_db.w", "r,r,r,u0:0", "amadd_db.w %1,%2,%3", 0, 0, 0},
+{0x386a0000, 0xffff8000, "amadd_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amadd_db.d", "r,r,r,u0:0", "amadd_db.d %1,%2,%3", 0, 0, 0},
+{0x386a8000, 0xffff8000, "amadd_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amand_db.w", "r,r,r,u0:0", "amand_db.w %1,%2,%3", 0, 0, 0},
+{0x386b0000, 0xffff8000, "amand_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amand_db.d", "r,r,r,u0:0", "amand_db.d %1,%2,%3", 0, 0, 0},
+{0x386b8000, 0xffff8000, "amand_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amor_db.w", "r,r,r,u0:0", "amor_db.w %1,%2,%3", 0, 0, 0},
+{0x386c0000, 0xffff8000, "amor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amor_db.d", "r,r,r,u0:0", "amor_db.d %1,%2,%3", 0, 0, 0},
+{0x386c8000, 0xffff8000, "amor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amxor_db.w", "r,r,r,u0:0", "amxor_db.w %1,%2,%3", 0, 0, 0},
+{0x386d0000, 0xffff8000, "amxor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "amxor_db.d", "r,r,r,u0:0", "amxor_db.d %1,%2,%3", 0, 0, 0},
+{0x386d8000, 0xffff8000, "amxor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax_db.w", "r,r,r,u0:0", "ammax_db.w %1,%2,%3", 0, 0, 0},
+{0x386e0000, 0xffff8000, "ammax_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax_db.d", "r,r,r,u0:0", "ammax_db.d %1,%2,%3", 0, 0, 0},
+{0x386e8000, 0xffff8000, "ammax_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin_db.w", "r,r,r,u0:0", "ammin_db.w %1,%2,%3", 0, 0, 0},
+{0x386f0000, 0xffff8000, "ammin_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin_db.d", "r,r,r,u0:0", "ammin_db.d %1,%2,%3", 0, 0, 0},
+{0x386f8000, 0xffff8000, "ammin_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax_db.wu", "r,r,r,u0:0", "ammax_db.wu %1,%2,%3", 0, 0, 0},
+{0x38700000, 0xffff8000, "ammax_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammax_db.du", "r,r,r,u0:0", "ammax_db.du %1,%2,%3", 0, 0, 0},
+{0x38708000, 0xffff8000, "ammax_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin_db.wu", "r,r,r,u0:0", "ammin_db.wu %1,%2,%3", 0, 0, 0},
+{0x38710000, 0xffff8000, "ammin_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0, 0, "ammin_db.du", "r,r,r,u0:0", "ammin_db.du %1,%2,%3", 0, 0, 0},
+{0x38718000, 0xffff8000, "ammin_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0},
+{0x38720000, 0xffff8000, "dbar", "u0:15", 0, 0, 0, 0},
+{0x38728000, 0xffff8000, "ibar", "u0:15", 0, 0, 0, 0},
+{0x38740000, 0xffff8000, "fldgt.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38748000, 0xffff8000, "fldgt.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38750000, 0xffff8000, "fldle.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38758000, 0xffff8000, "fldle.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38760000, 0xffff8000, "fstgt.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38768000, 0xffff8000, "fstgt.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38770000, 0xffff8000, "fstle.s", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38778000, 0xffff8000, "fstle.d", "f0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38780000, 0xffff8000, "ldgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38788000, 0xffff8000, "ldgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38790000, 0xffff8000, "ldgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x38798000, 0xffff8000, "ldgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387a0000, 0xffff8000, "ldle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387a8000, 0xffff8000, "ldle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387b0000, 0xffff8000, "ldle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387b8000, 0xffff8000, "ldle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387c0000, 0xffff8000, "stgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387c8000, 0xffff8000, "stgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387d0000, 0xffff8000, "stgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387d8000, 0xffff8000, "stgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387e0000, 0xffff8000, "stle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387e8000, 0xffff8000, "stle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387f0000, 0xffff8000, "stle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x387f8000, 0xffff8000, "stle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
+};
+
+static struct loongarch_opcode loongarch_jmp_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0, 0, "beqz", "r,la", "beqz %1,%%pcrel(%2)", 0, 0, 0},
+{0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0},
+{0, 0, "bnez", "r,la", "bnez %1,%%pcrel(%2)", 0, 0, 0},
+{0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0},
+{0, 0, "bceqz", "c,la", "bceqz %1,%%pcrel(%2)", 0, 0, 0},
+{0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0},
+{0, 0, "bcnez", "c,la", "bcnez %1,%%pcrel(%2)", 0, 0, 0},
+{0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0},
+{0, 0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0},
+{0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0},
+{0, 0, "b", "la", "b %%pcrel(%1)", 0, 0, 0},
+{0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0},
+{0, 0, "bl", "la", "bl %%pcrel(%1)", 0, 0, 0},
+{0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0},
+{0, 0, "beq", "r,r,la", "beq %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x58000000, 0xfc000000, "beq", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bne", "r,r,la", "bne %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "blt", "r,r,la", "blt %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bgt", "r,r,la", "bgt %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bltz", "r,la", "bltz %1,%%pcrel(%2)", 0, 0, 0},
+{0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bgtz", "r,la", "bgtz %1,%%pcrel(%2)", 0, 0, 0},
+{0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bge", "r,r,la", "bge %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "ble", "r,r,la", "ble %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bgez", "r,la", "bgez %1,%%pcrel(%2)", 0, 0, 0},
+{0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "blez", "r,la", "blez %1,%%pcrel(%2)", 0, 0, 0},
+{0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bltu", "r,r,la", "bltu %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bgtu", "r,r,la", "bgtu %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bgeu", "r,r,la", "bgeu %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0},
+{0, 0, "bleu", "r,r,la", "bleu %1,%2,%%pcrel(%3)", 0, 0, 0},
+{0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0},
+{0} /* Terminate the list.  */
+};
+
+static struct loongarch_opcode loongarch_128vec_opcodes[] = {
+/* match,    mask,       name, format, macro, include, exclude, pinfo */
+{0x729d1400, 0xfffffc00, "vfrecipe.s", "v0:5,v5:5", 0, 0, 0, 0},
+{0x729d1800, 0xfffffc00, "vfrecipe.d", "v0:5,v5:5", 0, 0, 0, 0},
+{0x729d2400, 0xfffffc00, "vfrsqrte.s", "v0:5,v5:5", 0, 0, 0, 0},
+{0x729d2800, 0xfffffc00, "vfrsqrte.d", "v0:5,v5:5", 0, 0, 0, 0},
 {0x70000000, 0xffff8000, "vseq.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
 {0x70008000, 0xffff8000, "vseq.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
 {0x70010000, 0xffff8000, "vseq.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0},
@@ -1443,21 +1578,12 @@ static struct loongarch_opcode loongarch_128vec_opcodes[] = {
 {0x73e40000, 0xfffc0000, "vpermi.w", "v0:5,v5:5,u10:8", 0, 0, 0, 0},
 {0} /* Terminate the list.  */
 };
-
 static struct loongarch_opcode loongarch_256vec_opcodes[] = {
 /* match,    mask,       name, format, macro, include, exclude, pinfo */
-{0x2c800000, 0xffc00000, "xvld", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
-{0x2cc00000, 0xffc00000, "xvst", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
-{0x32100000, 0xfff80000, "xvldrepl.d", "x0:5,r5:5,s10:9<<3", 0, 0, 0, 0},
-{0x32200000, 0xfff00000, "xvldrepl.w", "x0:5,r5:5,s10:10<<2", 0, 0, 0, 0},
-{0x32400000, 0xffe00000, "xvldrepl.h", "x0:5,r5:5,s10:11<<1", 0, 0, 0, 0},
-{0x32800000, 0xffc00000, "xvldrepl.b", "x0:5,r5:5,s10:12", 0, 0, 0, 0},
-{0x33100000, 0xfff00000, "xvstelm.d", "x0:5,r5:5,s10:8<<3,u18:2", 0, 0, 0, 0},
-{0x33200000, 0xffe00000, "xvstelm.w", "x0:5,r5:5,s10:8<<2,u18:3", 0, 0, 0, 0},
-{0x33400000, 0xffc00000, "xvstelm.h", "x0:5,r5:5,s10:8<<1,u18:4", 0, 0, 0, 0},
-{0x33800000, 0xff800000, "xvstelm.b", "x0:5,r5:5,s10:8,u18:5", 0, 0, 0, 0},
-{0x38480000, 0xffff8000, "xvldx", "x0:5,r5:5,r10:5", 0, 0, 0, 0},
-{0x384c0000, 0xffff8000, "xvstx", "x0:5,r5:5,r10:5", 0, 0, 0, 0},
+{0x769d1400, 0xfffffc00, "xvfrecipe.s", "x0:5,x5:5", 0, 0, 0, 0},
+{0x769d1800, 0xfffffc00, "xvfrecipe.d", "x0:5,x5:5", 0, 0, 0, 0},
+{0x769d2400, 0xfffffc00, "xvfrsqrte.s", "x0:5,x5:5", 0, 0, 0, 0},
+{0x769d2800, 0xfffffc00, "xvfrsqrte.d", "x0:5,x5:5", 0, 0, 0, 0},
 {0x74000000, 0xffff8000, "xvseq.b", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
 {0x74008000, 0xffff8000, "xvseq.h", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
 {0x74010000, 0xffff8000, "xvseq.w", "x0:5,x5:5,x10:5", 0, 0, 0, 0},
@@ -2131,22 +2257,20 @@ static struct loongarch_opcode loongarch_256vec_opcodes[] = {
 
 };
 
+
 struct loongarch_ase loongarch_ASEs[] = {
-	{&LARCH_opts.ase_fix, loongarch_macro_opcodes, 0, 0, {0}, 0, 0},
-	{ &LARCH_opts.ase_fix, loongarch_lmm_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_fix, loongarch_privilege_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_fix, loongarch_load_store_opcodes,	0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_fix, loongarch_fix_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_fix, loongarch_jmp_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_float_jmp_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_single_float_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_double_float_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_4opt_single_float_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_4opt_double_float_opcodes,		0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_single_float_load_store_opcodes,	0, 0, { 0 }, 0, 0 },
-	{ &LARCH_opts.ase_float, loongarch_double_float_load_store_opcodes,	0, 0, { 0 }, 0, 0 },
-	{&LARCH_opts.ase_128vec, loongarch_128vec_opcodes, 0, 0, {0}, 0, 0},
-	{&LARCH_opts.ase_256vec, loongarch_256vec_opcodes, 0, 0, {0}, 0, 0},
-	{0},
+{&LARCH_opts.ase_test, loongarch_test_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_macro_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_lmm_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_privilege_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_jmp_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_load_store_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_fix, loongarch_fix_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_float, loongarch_4opt_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_float, loongarch_float_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_128vec, loongarch_128vec_opcodes, 0, 0, {0}, 0, 0},
+{&LARCH_opts.ase_256vec, loongarch_256vec_opcodes, 0, 0, {0}, 0, 0},
+
+{0},
 };
 
-- 
2.39.3