diff --git a/LoongArch64-support.patch b/LoongArch64-support.patch index c249aab3133977dfdf6443254b999fac53436995..8ae6956cdcdc1eab391ff2a601e627e1f4c166ac 100644 --- a/LoongArch64-support.patch +++ b/LoongArch64-support.patch @@ -1,6 +1,7 @@ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/autoconf/jvm-features.m4 b/make/autoconf/jvm-features.m4 ---- a/make/autoconf/jvm-features.m4 2024-01-17 09:43:20.000000000 +0800 -+++ b/make/autoconf/jvm-features.m4 2024-02-20 10:42:35.822197048 +0800 +diff --git a/make/autoconf/jvm-features.m4 b/make/autoconf/jvm-features.m4 +index 28801984862..c37c5c27429 100644 +--- a/make/autoconf/jvm-features.m4 ++++ b/make/autoconf/jvm-features.m4 @@ -23,6 +23,12 @@ # questions. # @@ -14,7 +15,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ ############################################################################### # Terminology used in this file: # -@@ -283,6 +289,8 @@ +@@ -283,6 +289,8 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_JVMCI], AC_MSG_RESULT([yes]) elif test "x$OPENJDK_TARGET_CPU" = "xriscv64"; then AC_MSG_RESULT([yes]) @@ -23,7 +24,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ else AC_MSG_RESULT([no, $OPENJDK_TARGET_CPU]) AVAILABLE=false -@@ -300,7 +308,8 @@ +@@ -300,7 +308,8 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_SHENANDOAHGC], if test "x$OPENJDK_TARGET_CPU_ARCH" = "xx86" || \ test "x$OPENJDK_TARGET_CPU" = "xaarch64" || \ test "x$OPENJDK_TARGET_CPU" = "xppc64le" || \ @@ -33,23 +34,24 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ AC_MSG_RESULT([yes]) else AC_MSG_RESULT([no, $OPENJDK_TARGET_CPU]) -@@ -355,6 +364,13 @@ - if test "x$OPENJDK_TARGET_OS" = "xlinux"; then - AC_MSG_RESULT([yes]) - else -+ AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) -+ AVAILABLE=false -+ fi +@@ -358,6 +367,13 @@ AC_DEFUN_ONCE([JVM_FEATURES_CHECK_ZGC], + AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) + AVAILABLE=false + fi + elif test "x$OPENJDK_TARGET_CPU" = "xloongarch64"; then + if test "x$OPENJDK_TARGET_OS" = "xlinux"; then + AC_MSG_RESULT([yes]) + else - AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) - AVAILABLE=false - fi -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/autoconf/platform.m4 b/make/autoconf/platform.m4 ---- a/make/autoconf/platform.m4 2024-01-17 09:43:20.000000000 +0800 -+++ b/make/autoconf/platform.m4 2024-02-20 10:42:35.825530378 +0800 ++ AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) ++ AVAILABLE=false ++ fi + else + AC_MSG_RESULT([no, $OPENJDK_TARGET_OS-$OPENJDK_TARGET_CPU]) + AVAILABLE=false +diff --git a/make/autoconf/platform.m4 b/make/autoconf/platform.m4 +index df610cc489b..9f773892ff1 100644 +--- a/make/autoconf/platform.m4 ++++ b/make/autoconf/platform.m4 @@ -23,6 +23,12 @@ # questions. # @@ -63,7 +65,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ # Support macro for PLATFORM_EXTRACT_TARGET_AND_BUILD. # Converts autoconf style CPU name to OpenJDK style, into # VAR_CPU, VAR_CPU_ARCH, VAR_CPU_BITS and VAR_CPU_ENDIAN. -@@ -545,11 +551,20 @@ +@@ -545,11 +551,20 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER], HOTSPOT_$1_CPU=ppc_64 elif test "x$OPENJDK_$1_CPU" = xppc64le; then HOTSPOT_$1_CPU=ppc_64 @@ -84,7 +86,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ AC_SUBST(HOTSPOT_$1_CPU_ARCH) # Setup HOTSPOT_$1_CPU_DEFINE -@@ -569,6 +584,8 @@ +@@ -569,6 +584,8 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER], HOTSPOT_$1_CPU_DEFINE=PPC64 elif test "x$OPENJDK_$1_CPU" = xriscv64; then HOTSPOT_$1_CPU_DEFINE=RISCV64 @@ -93,9 +95,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/make/ # The cpu defines below are for zero, we don't support them directly. elif test "x$OPENJDK_$1_CPU" = xsparc; then -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp +new file mode 100644 +index 00000000000..5423a479801 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/abstractInterpreter_loongarch.cpp @@ -0,0 +1,155 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -252,9 +256,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + *interpreter_frame->interpreter_frame_mirror_addr() = method->method_holder()->java_mirror(); +} + -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/assembler_loongarch.cpp b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.cpp b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp +new file mode 100644 +index 00000000000..f9528680cf0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.cpp @@ -0,0 +1,820 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -1076,9 +1082,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp +new file mode 100644 +index 00000000000..dd936b41b8a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.hpp @@ -0,0 +1,3213 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -4293,9 +4301,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp +new file mode 100644 +index 00000000000..9ca0cd45047 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/assembler_loongarch.inline.hpp @@ -0,0 +1,33 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4330,9 +4340,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#include "code/codeCache.hpp" + +#endif // CPU_LOONGARCH_ASSEMBLER_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/bytes_loongarch.hpp b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/bytes_loongarch.hpp b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp +new file mode 100644 +index 00000000000..763404473e1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/bytes_loongarch.hpp @@ -0,0 +1,64 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -4398,9 +4410,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_BYTES_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp +new file mode 100644 +index 00000000000..e1cda84acc9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_CodeStubs_loongarch_64.cpp @@ -0,0 +1,338 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4740,9 +4754,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#undef __ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp +new file mode 100644 +index 00000000000..65850bc2520 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Defs_loongarch.hpp @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. @@ -4832,9 +4848,49 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_C1_DEFS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp 2024-02-20 10:42:36.152196787 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +new file mode 100644 +index 00000000000..bd8578c72a8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp +@@ -0,0 +1,32 @@ ++/* ++ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++ ++// No FPU stack on LoongArch ++class FpuStackSim; ++ ++#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp +new file mode 100644 +index 00000000000..1a89c437a83 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch_64.cpp @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved. @@ -4867,13 +4923,15 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + +// No FPU stack on LoongArch64 +#include "precompiled.hpp" -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_FpuStackSim_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 -@@ -0,0 +1,32 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +new file mode 100644 +index 00000000000..4f0cf053617 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp +@@ -0,0 +1,143 @@ +/* -+ * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -4896,16 +4954,129 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#ifndef CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP + -+// No FPU stack on LoongArch -+class FpuStackSim; ++// On LoongArch64 the frame looks as follows: ++// ++// +-----------------------------+---------+----------------------------------------+----------------+----------- ++// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . ++// +-----------------------------+---------+----------------------------------------+----------------+----------- + -+#endif // CPU_LOONGARCH_C1_FPUSTACKSIM_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp 2024-02-20 10:42:36.152196787 +0800 ++ public: ++ static const int pd_c_runtime_reserved_arg_size; ++ ++ enum { ++ first_available_sp_in_frame = 0, ++ frame_pad_in_bytes = 16, ++ nof_reg_args = 8 ++ }; ++ ++ public: ++ static LIR_Opr receiver_opr; ++ ++ static LIR_Opr r0_opr; ++ static LIR_Opr ra_opr; ++ static LIR_Opr tp_opr; ++ static LIR_Opr sp_opr; ++ static LIR_Opr a0_opr; ++ static LIR_Opr a1_opr; ++ static LIR_Opr a2_opr; ++ static LIR_Opr a3_opr; ++ static LIR_Opr a4_opr; ++ static LIR_Opr a5_opr; ++ static LIR_Opr a6_opr; ++ static LIR_Opr a7_opr; ++ static LIR_Opr t0_opr; ++ static LIR_Opr t1_opr; ++ static LIR_Opr t2_opr; ++ static LIR_Opr t3_opr; ++ static LIR_Opr t4_opr; ++ static LIR_Opr t5_opr; ++ static LIR_Opr t6_opr; ++ static LIR_Opr t7_opr; ++ static LIR_Opr t8_opr; ++ static LIR_Opr rx_opr; ++ static LIR_Opr fp_opr; ++ static LIR_Opr s0_opr; ++ static LIR_Opr s1_opr; ++ static LIR_Opr s2_opr; ++ static LIR_Opr s3_opr; ++ static LIR_Opr s4_opr; ++ static LIR_Opr s5_opr; ++ static LIR_Opr s6_opr; ++ static LIR_Opr s7_opr; ++ static LIR_Opr s8_opr; ++ ++ static LIR_Opr ra_oop_opr; ++ static LIR_Opr a0_oop_opr; ++ static LIR_Opr a1_oop_opr; ++ static LIR_Opr a2_oop_opr; ++ static LIR_Opr a3_oop_opr; ++ static LIR_Opr a4_oop_opr; ++ static LIR_Opr a5_oop_opr; ++ static LIR_Opr a6_oop_opr; ++ static LIR_Opr a7_oop_opr; ++ static LIR_Opr t0_oop_opr; ++ static LIR_Opr t1_oop_opr; ++ static LIR_Opr t2_oop_opr; ++ static LIR_Opr t3_oop_opr; ++ static LIR_Opr t4_oop_opr; ++ static LIR_Opr t5_oop_opr; ++ static LIR_Opr t6_oop_opr; ++ static LIR_Opr t7_oop_opr; ++ static LIR_Opr t8_oop_opr; ++ static LIR_Opr fp_oop_opr; ++ static LIR_Opr s0_oop_opr; ++ static LIR_Opr s1_oop_opr; ++ static LIR_Opr s2_oop_opr; ++ static LIR_Opr s3_oop_opr; ++ static LIR_Opr s4_oop_opr; ++ static LIR_Opr s5_oop_opr; ++ static LIR_Opr s6_oop_opr; ++ static LIR_Opr s7_oop_opr; ++ static LIR_Opr s8_oop_opr; ++ ++ static LIR_Opr scr1_opr; ++ static LIR_Opr scr2_opr; ++ static LIR_Opr scr1_long_opr; ++ static LIR_Opr scr2_long_opr; ++ ++ static LIR_Opr a0_metadata_opr; ++ static LIR_Opr a1_metadata_opr; ++ static LIR_Opr a2_metadata_opr; ++ static LIR_Opr a3_metadata_opr; ++ static LIR_Opr a4_metadata_opr; ++ static LIR_Opr a5_metadata_opr; ++ ++ static LIR_Opr long0_opr; ++ static LIR_Opr long1_opr; ++ static LIR_Opr fpu0_float_opr; ++ static LIR_Opr fpu0_double_opr; ++ ++ static LIR_Opr as_long_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ static LIR_Opr as_pointer_opr(Register r) { ++ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); ++ } ++ ++ // VMReg name for spilled physical FPU stack slot n ++ static VMReg fpu_regname (int n); ++ ++ static bool is_caller_save_register(LIR_Opr opr) { return true; } ++ static bool is_caller_save_register(Register r) { return true; } ++ ++ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } ++ static int last_cpu_reg() { return pd_last_cpu_reg; } ++ static int last_byte_reg() { return pd_last_byte_reg; } ++ ++#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp +new file mode 100644 +index 00000000000..f157536797b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch_64.cpp @@ -0,0 +1,345 @@ +/* + * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. @@ -5252,157 +5423,12 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +bool FrameMap::validate_frame() { + return true; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_FrameMap_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 -@@ -0,0 +1,143 @@ -+/* -+ * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -+ -+// On LoongArch64 the frame looks as follows: -+// -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . -+// +-----------------------------+---------+----------------------------------------+----------------+----------- -+ -+ public: -+ static const int pd_c_runtime_reserved_arg_size; -+ -+ enum { -+ first_available_sp_in_frame = 0, -+ frame_pad_in_bytes = 16, -+ nof_reg_args = 8 -+ }; -+ -+ public: -+ static LIR_Opr receiver_opr; -+ -+ static LIR_Opr r0_opr; -+ static LIR_Opr ra_opr; -+ static LIR_Opr tp_opr; -+ static LIR_Opr sp_opr; -+ static LIR_Opr a0_opr; -+ static LIR_Opr a1_opr; -+ static LIR_Opr a2_opr; -+ static LIR_Opr a3_opr; -+ static LIR_Opr a4_opr; -+ static LIR_Opr a5_opr; -+ static LIR_Opr a6_opr; -+ static LIR_Opr a7_opr; -+ static LIR_Opr t0_opr; -+ static LIR_Opr t1_opr; -+ static LIR_Opr t2_opr; -+ static LIR_Opr t3_opr; -+ static LIR_Opr t4_opr; -+ static LIR_Opr t5_opr; -+ static LIR_Opr t6_opr; -+ static LIR_Opr t7_opr; -+ static LIR_Opr t8_opr; -+ static LIR_Opr rx_opr; -+ static LIR_Opr fp_opr; -+ static LIR_Opr s0_opr; -+ static LIR_Opr s1_opr; -+ static LIR_Opr s2_opr; -+ static LIR_Opr s3_opr; -+ static LIR_Opr s4_opr; -+ static LIR_Opr s5_opr; -+ static LIR_Opr s6_opr; -+ static LIR_Opr s7_opr; -+ static LIR_Opr s8_opr; -+ -+ static LIR_Opr ra_oop_opr; -+ static LIR_Opr a0_oop_opr; -+ static LIR_Opr a1_oop_opr; -+ static LIR_Opr a2_oop_opr; -+ static LIR_Opr a3_oop_opr; -+ static LIR_Opr a4_oop_opr; -+ static LIR_Opr a5_oop_opr; -+ static LIR_Opr a6_oop_opr; -+ static LIR_Opr a7_oop_opr; -+ static LIR_Opr t0_oop_opr; -+ static LIR_Opr t1_oop_opr; -+ static LIR_Opr t2_oop_opr; -+ static LIR_Opr t3_oop_opr; -+ static LIR_Opr t4_oop_opr; -+ static LIR_Opr t5_oop_opr; -+ static LIR_Opr t6_oop_opr; -+ static LIR_Opr t7_oop_opr; -+ static LIR_Opr t8_oop_opr; -+ static LIR_Opr fp_oop_opr; -+ static LIR_Opr s0_oop_opr; -+ static LIR_Opr s1_oop_opr; -+ static LIR_Opr s2_oop_opr; -+ static LIR_Opr s3_oop_opr; -+ static LIR_Opr s4_oop_opr; -+ static LIR_Opr s5_oop_opr; -+ static LIR_Opr s6_oop_opr; -+ static LIR_Opr s7_oop_opr; -+ static LIR_Opr s8_oop_opr; -+ -+ static LIR_Opr scr1_opr; -+ static LIR_Opr scr2_opr; -+ static LIR_Opr scr1_long_opr; -+ static LIR_Opr scr2_long_opr; -+ -+ static LIR_Opr a0_metadata_opr; -+ static LIR_Opr a1_metadata_opr; -+ static LIR_Opr a2_metadata_opr; -+ static LIR_Opr a3_metadata_opr; -+ static LIR_Opr a4_metadata_opr; -+ static LIR_Opr a5_metadata_opr; -+ -+ static LIR_Opr long0_opr; -+ static LIR_Opr long1_opr; -+ static LIR_Opr fpu0_float_opr; -+ static LIR_Opr fpu0_double_opr; -+ -+ static LIR_Opr as_long_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ static LIR_Opr as_pointer_opr(Register r) { -+ return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); -+ } -+ -+ // VMReg name for spilled physical FPU stack slot n -+ static VMReg fpu_regname (int n); -+ -+ static bool is_caller_save_register(LIR_Opr opr) { return true; } -+ static bool is_caller_save_register(Register r) { return true; } -+ -+ static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } -+ static int last_cpu_reg() { return pd_last_cpu_reg; } -+ static int last_byte_reg() { return pd_last_byte_reg; } -+ -+#endif // CPU_LOONGARCH_C1_FRAMEMAP_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,64 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..2d489e691b9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp +@@ -0,0 +1,84 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. @@ -5428,160 +5454,71 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP + -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" ++// ArrayCopyStub needs access to bailout ++friend class ArrayCopyStub; + -+// Sets the default values for platform dependent flags used by the client compiler. -+// (see c1_globals.hpp) ++ private: ++ int array_element_size(BasicType type) const; + -+#ifndef COMPILER2 -+define_pd_global(bool, BackgroundCompilation, true ); -+define_pd_global(bool, InlineIntrinsics, true ); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, false); -+define_pd_global(bool, UseOnStackReplacement, true ); -+define_pd_global(bool, TieredCompilation, false); -+define_pd_global(intx, CompileThreshold, 1500 ); ++ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, ++ int dest_index, bool pop_fpu_stack); + -+define_pd_global(intx, OnStackReplacePercentage, 933 ); -+define_pd_global(intx, NewSizeThreadIncrease, 4*K ); -+define_pd_global(intx, InitialCodeCacheSize, 160*K); -+define_pd_global(intx, ReservedCodeCacheSize, 32*M ); -+define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); -+define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(bool, ProfileInterpreter, false); -+define_pd_global(intx, CodeCacheExpansionSize, 32*K ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 1); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+define_pd_global(bool, NeverActAsServerClassMachine, true ); -+define_pd_global(uint64_t,MaxRAM, 1ULL*G); -+define_pd_global(bool, CICompileOSR, true ); -+#endif // !COMPILER2 -+define_pd_global(bool, UseTypeProfile, false); ++ // helper functions which checks for overflow and sets bailout if it ++ // occurs. Always returns a valid embeddable pointer but in the ++ // bailout case the pointer won't be to unique storage. ++ address float_constant(float f); ++ address double_constant(double d); + -+define_pd_global(bool, OptimizeSinglePrecision, true ); -+define_pd_global(bool, CSEArrayLength, false); ++ address int_constant(jlong n); + -+#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,33 @@ -+/* -+ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ bool is_literal_address(LIR_Address* addr); + -+#include "precompiled.hpp" -+#include "c1/c1_Instruction.hpp" -+#include "c1/c1_LinearScan.hpp" -+#include "utilities/bitMap.inline.hpp" ++ // Ensure we have a valid Address (base+offset) to a stack-slot. ++ Address stack_slot_address(int index, uint shift, int adjust = 0); + -+void LinearScan::allocate_fpu_stack() { -+ // No FPU stack on LoongArch64 -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,70 @@ -+/* -+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ ++ // Record the type of the receiver in ReceiverTypeData ++ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, ++ Register recv, Label* update_done); ++ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); + -+#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ void casw(Register addr, Register newval, Register cmpval, Register result, bool sign); ++ void casl(Register addr, Register newval, Register cmpval, Register result); + -+inline bool LinearScan::is_processed_reg_num(int reg_num) { -+ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; -+} ++ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = nullptr); + -+inline int LinearScan::num_physical_regs(BasicType type) { -+ return 1; -+} ++ static const int max_tableswitches = 20; ++ struct tableswitch switches[max_tableswitches]; ++ int tableswitch_count; + -+inline bool LinearScan::requires_adjacent_regs(BasicType type) { -+ return false; -+} ++ void init() { tableswitch_count = 0; } + -+inline bool LinearScan::is_caller_save(int assigned_reg) { -+ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); -+ if (assigned_reg < pd_first_callee_saved_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) -+ return true; -+ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) -+ return true; -+ return false; -+} ++ void deoptimize_trap(CodeEmitInfo *info); + -+inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ void emit_cmp_branch(LIR_OpBranch* op); + -+// Implementation of LinearScanWalker -+inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { -+ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { -+ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); -+ _first_reg = pd_first_callee_saved_reg; -+ _last_reg = pd_last_callee_saved_reg; -+ return true; -+ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || -+ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { -+ _first_reg = pd_first_cpu_reg; -+ _last_reg = pd_last_allocatable_cpu_reg; -+ return true; -+ } -+ return false; -+} ++ enum { ++ // call stub: CompiledStaticCall::to_interp_stub_size() + ++ // CompiledStaticCall::to_trampoline_stub_size() ++ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, ++ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), ++ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size ++ }; + -+#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp 2024-02-20 10:42:36.152196787 +0800 -@@ -0,0 +1,3369 @@ ++public: ++ void store_parameter(Register r, int offset_from_sp_in_words); ++ void store_parameter(jint c, int offset_from_sp_in_words); ++ void store_parameter(jobject c, int offset_from_sp_in_words); ++ ++#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp +new file mode 100644 +index 00000000000..5f3a52ac90b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp +@@ -0,0 +1,3383 @@ +/* + * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. @@ -8578,7 +8515,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ verify_oop(obj); + + if (tmp != obj) { ++ assert_different_registers(obj, tmp, SCR1, SCR2, mdo_addr.base(), mdo_addr.index()); + __ move(tmp, obj); ++ } else { ++ assert_different_registers(obj, SCR1, SCR2, mdo_addr.base(), mdo_addr.index()); + } + if (do_null) { + __ bnez(tmp, update); @@ -8637,10 +8577,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ beqz(SCR2, none); + __ li(SCR1, (u1)TypeEntries::null_seen); + __ beq(SCR2, SCR1, none); -+ // There is a chance that the checks above (re-reading profiling -+ // data from memory) fail if another thread has just set the ++ // There is a chance that the checks above ++ // fail if another thread has just set the + // profiling to this obj's klass + membar_acquire(); ++ __ XOR(tmp, tmp, SCR2); // get back original value before XOR + __ ld_d(SCR2, mdo_addr); + __ XOR(tmp, tmp, SCR2); + assert(TypeEntries::type_klass_mask == -4, "must be"); @@ -8667,6 +8608,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ bind(none); + // first time here. Set profile type. + __ st_d(tmp, mdo_addr); ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ __ bstrpick_d(tmp, tmp, 63, 1); ++ __ verify_klass_ptr(tmp); ++#endif + } + } else { + // There's a single possible klass at this profile point @@ -8700,6 +8646,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#endif + // first time here. Set profile type. + __ st_d(tmp, mdo_addr); ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ __ bstrpick_d(tmp, tmp, 63, 1); ++ __ verify_klass_ptr(tmp); ++#endif + } else { + assert(ciTypeEntries::valid_ciklass(current_klass) != nullptr && + ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent"); @@ -8951,101 +8902,15 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#undef __ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch.hpp 2024-02-20 10:42:36.152196787 +0800 -@@ -0,0 +1,84 @@ -+/* -+ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -+ -+// ArrayCopyStub needs access to bailout -+friend class ArrayCopyStub; -+ -+ private: -+ int array_element_size(BasicType type) const; -+ -+ void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, -+ int dest_index, bool pop_fpu_stack); -+ -+ // helper functions which checks for overflow and sets bailout if it -+ // occurs. Always returns a valid embeddable pointer but in the -+ // bailout case the pointer won't be to unique storage. -+ address float_constant(float f); -+ address double_constant(double d); -+ -+ address int_constant(jlong n); -+ -+ bool is_literal_address(LIR_Address* addr); -+ -+ // Ensure we have a valid Address (base+offset) to a stack-slot. -+ Address stack_slot_address(int index, uint shift, int adjust = 0); -+ -+ // Record the type of the receiver in ReceiverTypeData -+ void type_profile_helper(Register mdo, ciMethodData *md, ciProfileData *data, -+ Register recv, Label* update_done); -+ void add_debug_info_for_branch(address adr, CodeEmitInfo* info); -+ -+ void casw(Register addr, Register newval, Register cmpval, Register result, bool sign); -+ void casl(Register addr, Register newval, Register cmpval, Register result); -+ -+ void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = nullptr); -+ -+ static const int max_tableswitches = 20; -+ struct tableswitch switches[max_tableswitches]; -+ int tableswitch_count; -+ -+ void init() { tableswitch_count = 0; } -+ -+ void deoptimize_trap(CodeEmitInfo *info); -+ -+ void emit_cmp_branch(LIR_OpBranch* op); -+ -+ enum { -+ // call stub: CompiledStaticCall::to_interp_stub_size() + -+ // CompiledStaticCall::to_trampoline_stub_size() -+ _call_stub_size = 13 * NativeInstruction::nop_instruction_size, -+ _exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), -+ _deopt_handler_size = 7 * NativeInstruction::nop_instruction_size -+ }; -+ -+public: -+ void store_parameter(Register r, int offset_from_sp_in_words); -+ void store_parameter(jint c, int offset_from_sp_in_words); -+ void store_parameter(jobject c, int offset_from_sp_in_words); -+ -+#endif // CPU_LOONGARCH_C1_LIRASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp 2024-02-20 10:42:36.152196787 +0800 -@@ -0,0 +1,1391 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +new file mode 100644 +index 00000000000..bf5fba7a100 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp +@@ -0,0 +1,1393 @@ +/* + * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. ++ * Copyright (c) 2021, 2024, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -9202,8 +9067,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + if (index->is_register()) { + // apply the shift and accumulate the displacement + if (shift > 0) { -+ LIR_Opr tmp = new_pointer_register(); -+ __ shift_left(index, shift, tmp); ++ // Use long register to avoid overflow when shifting large index values left. ++ LIR_Opr tmp = new_register(T_LONG); ++ __ convert(Bytecodes::_i2l, index, tmp); ++ __ shift_left(tmp, shift, tmp); + index = tmp; + } + if (large_disp != 0) { @@ -10434,9 +10301,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + __ volatile_load_mem_reg(address, result, info); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp +new file mode 100644 +index 00000000000..45e189e4d51 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LIR_loongarch_64.cpp @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2016, 2021, Oracle and/or its affiliates. All rights reserved. @@ -10495,9 +10364,243 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + "wrong type for addresses"); +} +#endif // PRODUCT -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +new file mode 100644 +index 00000000000..f15dacafeba +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch.hpp +@@ -0,0 +1,70 @@ ++/* ++ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP ++ ++inline bool LinearScan::is_processed_reg_num(int reg_num) { ++ return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map; ++} ++ ++inline int LinearScan::num_physical_regs(BasicType type) { ++ return 1; ++} ++ ++inline bool LinearScan::requires_adjacent_regs(BasicType type) { ++ return false; ++} ++ ++inline bool LinearScan::is_caller_save(int assigned_reg) { ++ assert(assigned_reg >= 0 && assigned_reg < nof_regs, "should call this only for registers"); ++ if (assigned_reg < pd_first_callee_saved_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_reg && assigned_reg < pd_first_callee_saved_fpu_reg) ++ return true; ++ if (assigned_reg > pd_last_callee_saved_fpu_reg && assigned_reg < pd_last_fpu_reg) ++ return true; ++ return false; ++} ++ ++inline void LinearScan::pd_add_temps(LIR_Op* op) {} ++ ++// Implementation of LinearScanWalker ++inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) { ++ if (allocator()->gen()->is_vreg_flag_set(cur->reg_num(), LIRGenerator::callee_saved)) { ++ assert(cur->type() != T_FLOAT && cur->type() != T_DOUBLE, "cpu regs only"); ++ _first_reg = pd_first_callee_saved_reg; ++ _last_reg = pd_last_callee_saved_reg; ++ return true; ++ } else if (cur->type() == T_INT || cur->type() == T_LONG || cur->type() == T_OBJECT || ++ cur->type() == T_ADDRESS || cur->type() == T_METADATA) { ++ _first_reg = pd_first_cpu_reg; ++ _last_reg = pd_last_allocatable_cpu_reg; ++ return true; ++ } ++ return false; ++} ++ ++#endif // CPU_LOONGARCH_C1_LINEARSCAN_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +new file mode 100644 +index 00000000000..219b2e3671c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_LinearScan_loongarch_64.cpp +@@ -0,0 +1,33 @@ ++/* ++ * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved. All rights reserved. ++ * Copyright (c) 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "c1/c1_Instruction.hpp" ++#include "c1/c1_LinearScan.hpp" ++#include "utilities/bitMap.inline.hpp" ++ ++void LinearScan::allocate_fpu_stack() { ++ // No FPU stack on LoongArch64 ++} +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..d1c63b13896 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp +@@ -0,0 +1,111 @@ ++/* ++ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP ++ ++using MacroAssembler::build_frame; ++using MacroAssembler::null_check; ++ ++// C1_MacroAssembler contains high-level macros for C1 ++ ++ private: ++ int _rsp_offset; // track rsp changes ++ // initialization ++ void pd_init() { _rsp_offset = 0; } ++ ++ public: ++ void try_allocate( ++ Register obj, // result: pointer to object after successful allocation ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ Label& slow_case // continuation point if fast allocation fails ++ ); ++ ++ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); ++ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); ++ ++ // locking ++ // hdr : must be A0, contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must point to the displaced header location, contents preserved ++ // returns code offset at which to add null check debug information ++ int lock_object (Register swap, Register obj, Register disp_hdr, Label& slow_case); ++ ++ // unlocking ++ // hdr : contents destroyed ++ // obj : must point to the object to lock, contents preserved ++ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed ++ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); ++ ++ void initialize_object( ++ Register obj, // result: pointer to object after successful allocation ++ Register klass, // object klass ++ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise ++ int con_size_in_bytes, // object size in bytes if known at compile time ++ Register t1, // temp register ++ Register t2, // temp register ++ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB ++ ); ++ ++ // allocation of fixed-size objects ++ // (can also be used to allocate fixed-size arrays, by setting ++ // hdr_size correctly and storing the array length afterwards) ++ // obj : will contain pointer to allocated object ++ // t1, t2 : scratch registers - contents destroyed ++ // header_size: size of object header in words ++ // object_size: total size of object in words ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_object(Register obj, Register t1, Register t2, int header_size, ++ int object_size, Register klass, Label& slow_case); ++ ++ enum { ++ max_array_allocation_length = 0x00FFFFFF ++ }; ++ ++ // allocation of arrays ++ // obj : will contain pointer to allocated object ++ // len : array length in number of elements ++ // t : scratch register - contents destroyed ++ // header_size: size of object header in words ++ // f : element scale factor ++ // slow_case : exit to slow case implementation if fast allocation fails ++ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, ++ int f, Register klass, Label& slow_case); ++ ++ int rsp_offset() const { return _rsp_offset; } ++ void set_rsp_offset(int n) { _rsp_offset = n; } ++ ++ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, ++ bool inv_a4, bool inv_a5) PRODUCT_RETURN; ++ ++ // This platform only uses signal-based null checks. The Label is not needed. ++ void null_check(Register r, Label *Lnull = nullptr) { MacroAssembler::null_check(r); } ++ ++ void load_parameter(int offset_in_words, Register reg); ++ ++#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp +new file mode 100644 +index 00000000000..eaaaf464fe6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp @@ -0,0 +1,350 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. @@ -10849,125 +10952,12 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#endif +} +#endif // ifndef PRODUCT -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,111 @@ -+/* -+ * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+#define CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -+ -+using MacroAssembler::build_frame; -+using MacroAssembler::null_check; -+ -+// C1_MacroAssembler contains high-level macros for C1 -+ -+ private: -+ int _rsp_offset; // track rsp changes -+ // initialization -+ void pd_init() { _rsp_offset = 0; } -+ -+ public: -+ void try_allocate( -+ Register obj, // result: pointer to object after successful allocation -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ Label& slow_case // continuation point if fast allocation fails -+ ); -+ -+ void initialize_header(Register obj, Register klass, Register len, Register t1, Register t2); -+ void initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1, Register t2); -+ -+ // locking -+ // hdr : must be A0, contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must point to the displaced header location, contents preserved -+ // returns code offset at which to add null check debug information -+ int lock_object (Register swap, Register obj, Register disp_hdr, Label& slow_case); -+ -+ // unlocking -+ // hdr : contents destroyed -+ // obj : must point to the object to lock, contents preserved -+ // disp_hdr: must be A0 & must point to the displaced header location, contents destroyed -+ void unlock_object(Register swap, Register obj, Register lock, Label& slow_case); -+ -+ void initialize_object( -+ Register obj, // result: pointer to object after successful allocation -+ Register klass, // object klass -+ Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise -+ int con_size_in_bytes, // object size in bytes if known at compile time -+ Register t1, // temp register -+ Register t2, // temp register -+ bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB -+ ); -+ -+ // allocation of fixed-size objects -+ // (can also be used to allocate fixed-size arrays, by setting -+ // hdr_size correctly and storing the array length afterwards) -+ // obj : will contain pointer to allocated object -+ // t1, t2 : scratch registers - contents destroyed -+ // header_size: size of object header in words -+ // object_size: total size of object in words -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_object(Register obj, Register t1, Register t2, int header_size, -+ int object_size, Register klass, Label& slow_case); -+ -+ enum { -+ max_array_allocation_length = 0x00FFFFFF -+ }; -+ -+ // allocation of arrays -+ // obj : will contain pointer to allocated object -+ // len : array length in number of elements -+ // t : scratch register - contents destroyed -+ // header_size: size of object header in words -+ // f : element scale factor -+ // slow_case : exit to slow case implementation if fast allocation fails -+ void allocate_array(Register obj, Register len, Register t, Register t2, int header_size, -+ int f, Register klass, Label& slow_case); -+ -+ int rsp_offset() const { return _rsp_offset; } -+ void set_rsp_offset(int n) { _rsp_offset = n; } -+ -+ void invalidate_registers(bool inv_a0, bool inv_s0, bool inv_a2, bool inv_a3, -+ bool inv_a4, bool inv_a5) PRODUCT_RETURN; -+ -+ // This platform only uses signal-based null checks. The Label is not needed. -+ void null_check(Register r, Label *Lnull = nullptr) { MacroAssembler::null_check(r); } -+ -+ void load_parameter(int offset_in_words, Register reg); -+ -+#endif // CPU_LOONGARCH_C1_MACROASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,1041 @@ +diff --git a/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp +new file mode 100644 +index 00000000000..21f7c6f2d00 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp +@@ -0,0 +1,1049 @@ +/* + * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. @@ -11441,6 +11431,14 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + const Register exception_pc = A1; + const Register handler_addr = A3; + ++ if (AbortVMOnException) { ++ __ enter(); ++ save_live_registers(sasm); ++ __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), A0); ++ restore_live_registers(sasm); ++ __ leave(); ++ } ++ + // verify that only A0, is valid at this time + __ invalidate_registers(false, true, true, true, true, true); + @@ -12009,9 +12007,81 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + Unimplemented(); + return 0; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +new file mode 100644 +index 00000000000..a97091dda04 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c1_globals_loongarch.hpp +@@ -0,0 +1,64 @@ ++/* ++ * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2021, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP ++ ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" ++ ++// Sets the default values for platform dependent flags used by the client compiler. ++// (see c1_globals.hpp) ++ ++#ifndef COMPILER2 ++define_pd_global(bool, BackgroundCompilation, true ); ++define_pd_global(bool, InlineIntrinsics, true ); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, false); ++define_pd_global(bool, UseOnStackReplacement, true ); ++define_pd_global(bool, TieredCompilation, false); ++define_pd_global(intx, CompileThreshold, 1500 ); ++ ++define_pd_global(intx, OnStackReplacePercentage, 933 ); ++define_pd_global(intx, NewSizeThreadIncrease, 4*K ); ++define_pd_global(intx, InitialCodeCacheSize, 160*K); ++define_pd_global(intx, ReservedCodeCacheSize, 32*M ); ++define_pd_global(intx, NonProfiledCodeHeapSize, 13*M ); ++define_pd_global(intx, ProfiledCodeHeapSize, 14*M ); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(bool, ProfileInterpreter, false); ++define_pd_global(intx, CodeCacheExpansionSize, 32*K ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 1); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++define_pd_global(bool, NeverActAsServerClassMachine, true ); ++define_pd_global(uint64_t,MaxRAM, 1ULL*G); ++define_pd_global(bool, CICompileOSR, true ); ++#endif // !COMPILER2 ++define_pd_global(bool, UseTypeProfile, false); ++ ++define_pd_global(bool, OptimizeSinglePrecision, true ); ++define_pd_global(bool, CSEArrayLength, false); ++ ++#endif // CPU_LOONGARCH_C1_GLOBALS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp +new file mode 100644 +index 00000000000..4672c7b08a8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2020, 2021, Oracle and/or its affiliates. All rights reserved. @@ -12104,139 +12174,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#undef __ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,85 @@ -+/* -+ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -+#define CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -+ -+#include "utilities/globalDefinitions.hpp" -+#include "utilities/macros.hpp" -+ -+// Sets the default values for platform dependent flags used by the server compiler. -+// (see c2_globals.hpp). Alpha-sorted. -+define_pd_global(bool, BackgroundCompilation, true); -+define_pd_global(bool, UseTLAB, true); -+define_pd_global(bool, ResizeTLAB, true); -+define_pd_global(bool, CICompileOSR, true); -+define_pd_global(bool, InlineIntrinsics, true); -+define_pd_global(bool, PreferInterpreterNativeStubs, false); -+define_pd_global(bool, ProfileTraps, true); -+define_pd_global(bool, UseOnStackReplacement, true); -+define_pd_global(bool, ProfileInterpreter, true); -+define_pd_global(bool, TieredCompilation, true); -+define_pd_global(intx, CompileThreshold, 10000); -+define_pd_global(intx, BackEdgeThreshold, 100000); -+ -+define_pd_global(intx, OnStackReplacePercentage, 140); -+define_pd_global(intx, ConditionalMoveLimit, 3); -+define_pd_global(intx, FreqInlineSize, 325); -+define_pd_global(intx, MinJumpTableSize, 10); -+define_pd_global(intx, InteriorEntryAlignment, 16); -+define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); -+define_pd_global(intx, LoopUnrollLimit, 60); -+define_pd_global(intx, LoopPercentProfileLimit, 10); -+// InitialCodeCacheSize derived from specjbb2000 run. -+define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize -+define_pd_global(intx, CodeCacheExpansionSize, 64*K); -+ -+// Ergonomics related flags -+define_pd_global(uint64_t,MaxRAM, 128ULL*G); -+define_pd_global(intx, RegisterCostAreaRatio, 16000); -+ -+// Peephole and CISC spilling both break the graph, and so makes the -+// scheduler sick. -+define_pd_global(bool, OptoPeephole, false); -+define_pd_global(bool, UseCISCSpill, false); -+define_pd_global(bool, OptoScheduling, false); -+define_pd_global(bool, OptoBundling, false); -+define_pd_global(bool, OptoRegScheduling, false); -+define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); -+define_pd_global(bool, IdealizeClearArrayNode, true); -+ -+define_pd_global(intx, ReservedCodeCacheSize, 48*M); -+define_pd_global(intx, NonProfiledCodeHeapSize, 21*M); -+define_pd_global(intx, ProfiledCodeHeapSize, 22*M); -+define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); -+define_pd_global(uintx, CodeCacheMinBlockLength, 4); -+define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); -+ -+define_pd_global(bool, TrapBasedRangeChecks, false); -+ -+// Ergonomics related flags -+define_pd_global(bool, NeverActAsServerClassMachine, false); -+ -+#endif // CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "opto/compile.hpp" -+#include "opto/node.hpp" -+ -+// processor dependent initialization for LoongArch -+ -+extern void reg_mask_init(); -+ -+void Compile::pd_compiler2_init() { -+ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); -+ reg_mask_init(); -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..d83d08e9549 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.cpp @@ -0,0 +1,1903 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. @@ -14141,9 +14083,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + return MacroAssembler::in_scratch_emit_size(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..804e060f195 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_MacroAssembler_loongarch.hpp @@ -0,0 +1,141 @@ +/* + * Copyright (c) 2020, Oracle and/or its affiliates. All rights reserved. @@ -14286,13 +14230,15 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + void reduce_ins_r(Register reg1, Register reg2, Register reg3, BasicType type, int opcode); + void reduce_ins_f(FloatRegister reg1, FloatRegister reg2, FloatRegister reg3, BasicType type, int opcode); +#endif // CPU_LOONGARCH_C2_MACROASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 -@@ -0,0 +1,32 @@ +diff --git a/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp +new file mode 100644 +index 00000000000..a1054036f2d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_globals_loongarch.hpp +@@ -0,0 +1,85 @@ +/* -+ * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved. -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -14315,19 +14261,155 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#include "precompiled.hpp" -+#include "asm/codeBuffer.inline.hpp" -+#include "asm/macroAssembler.hpp" ++#ifndef CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP ++#define CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP + -+bool CodeBuffer::pd_finalize_stubs() { -+ return emit_shared_stubs_to_interp(this, _shared_stub_to_interp_requests); -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 ++#include "utilities/globalDefinitions.hpp" ++#include "utilities/macros.hpp" ++ ++// Sets the default values for platform dependent flags used by the server compiler. ++// (see c2_globals.hpp). Alpha-sorted. ++define_pd_global(bool, BackgroundCompilation, true); ++define_pd_global(bool, UseTLAB, true); ++define_pd_global(bool, ResizeTLAB, true); ++define_pd_global(bool, CICompileOSR, true); ++define_pd_global(bool, InlineIntrinsics, true); ++define_pd_global(bool, PreferInterpreterNativeStubs, false); ++define_pd_global(bool, ProfileTraps, true); ++define_pd_global(bool, UseOnStackReplacement, true); ++define_pd_global(bool, ProfileInterpreter, true); ++define_pd_global(bool, TieredCompilation, true); ++define_pd_global(intx, CompileThreshold, 10000); ++define_pd_global(intx, BackEdgeThreshold, 100000); ++ ++define_pd_global(intx, OnStackReplacePercentage, 140); ++define_pd_global(intx, ConditionalMoveLimit, 3); ++define_pd_global(intx, FreqInlineSize, 325); ++define_pd_global(intx, MinJumpTableSize, 10); ++define_pd_global(intx, InteriorEntryAlignment, 16); ++define_pd_global(intx, NewSizeThreadIncrease, ScaleForWordSize(4*K)); ++define_pd_global(intx, LoopUnrollLimit, 60); ++define_pd_global(intx, LoopPercentProfileLimit, 10); ++// InitialCodeCacheSize derived from specjbb2000 run. ++define_pd_global(intx, InitialCodeCacheSize, 2496*K); // Integral multiple of CodeCacheExpansionSize ++define_pd_global(intx, CodeCacheExpansionSize, 64*K); ++ ++// Ergonomics related flags ++define_pd_global(uint64_t,MaxRAM, 128ULL*G); ++define_pd_global(intx, RegisterCostAreaRatio, 16000); ++ ++// Peephole and CISC spilling both break the graph, and so makes the ++// scheduler sick. ++define_pd_global(bool, OptoPeephole, false); ++define_pd_global(bool, UseCISCSpill, false); ++define_pd_global(bool, OptoScheduling, false); ++define_pd_global(bool, OptoBundling, false); ++define_pd_global(bool, OptoRegScheduling, false); ++define_pd_global(bool, SuperWordLoopUnrollAnalysis, true); ++define_pd_global(bool, IdealizeClearArrayNode, true); ++ ++define_pd_global(intx, ReservedCodeCacheSize, 48*M); ++define_pd_global(intx, NonProfiledCodeHeapSize, 21*M); ++define_pd_global(intx, ProfiledCodeHeapSize, 22*M); ++define_pd_global(intx, NonNMethodCodeHeapSize, 5*M ); ++define_pd_global(uintx, CodeCacheMinBlockLength, 4); ++define_pd_global(uintx, CodeCacheMinimumUseSpace, 400*K); ++ ++define_pd_global(bool, TrapBasedRangeChecks, false); ++ ++// Ergonomics related flags ++define_pd_global(bool, NeverActAsServerClassMachine, false); ++ ++#endif // CPU_LOONGARCH_C2_GLOBALS_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp +new file mode 100644 +index 00000000000..ec78b942d40 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/c2_init_loongarch.cpp @@ -0,0 +1,37 @@ +/* -+ * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "opto/compile.hpp" ++#include "opto/node.hpp" ++ ++// processor dependent initialization for LoongArch ++ ++extern void reg_mask_init(); ++ ++void Compile::pd_compiler2_init() { ++ guarantee(CodeEntryAlignment >= InteriorEntryAlignment, "" ); ++ reg_mask_init(); ++} +diff --git a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp +new file mode 100644 +index 00000000000..3fdfbb27cc0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.cpp +@@ -0,0 +1,32 @@ ++/* ++ * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved. ++ * Copyright (c) 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/codeBuffer.inline.hpp" ++#include "asm/macroAssembler.hpp" ++ ++bool CodeBuffer::pd_finalize_stubs() { ++ return emit_shared_stubs_to_interp(this, _shared_stub_to_interp_requests); ++} +diff --git a/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp +new file mode 100644 +index 00000000000..c8041a57f96 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/codeBuffer_loongarch.hpp +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -14363,9 +14445,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + static constexpr bool supports_shared_stubs() { return true; } + +#endif // CPU_LOONGARCH_CODEBUFFER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp +new file mode 100644 +index 00000000000..17ee4b75f72 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/compiledIC_loongarch.cpp @@ -0,0 +1,138 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -14505,9 +14589,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // !PRODUCT -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp +new file mode 100644 +index 00000000000..c2d91996000 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.hpp @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2022 SAP SE. All rights reserved. @@ -14542,9 +14628,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_CONTINUATIONENTRY_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp +new file mode 100644 +index 00000000000..d1c01ee42f0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/continuationEntry_loongarch.inline.hpp @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. @@ -14598,9 +14686,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_CONTINUATIONENTRY_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp +new file mode 100644 +index 00000000000..c4c49842464 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/continuationFreezeThaw_loongarch.inline.hpp @@ -0,0 +1,284 @@ +/* + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. @@ -14886,9 +14976,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_CONTINUATIONFREEZETHAW_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp +new file mode 100644 +index 00000000000..b36584a968a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/continuationHelper_loongarch.inline.hpp @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. @@ -15035,9 +15127,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_CONTINUATIONFRAMEHELPERS_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/copy_loongarch.cpp b/src/hotspot/cpu/loongarch/copy_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/copy_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/copy_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/copy_loongarch.cpp b/src/hotspot/cpu/loongarch/copy_loongarch.cpp +new file mode 100644 +index 00000000000..68f3bae9ef3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/copy_loongarch.cpp @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -15186,9 +15280,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +Copy::FillHeapWord Copy::_fill_to_words = c_fill_to_words; +Copy::FillHeapWord Copy::_fill_to_aligned_words = c_fill_to_aligned_words; +Copy::FillByte Copy::_fill_to_bytes = c_fill_to_bytes; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/copy_loongarch.hpp b/src/hotspot/cpu/loongarch/copy_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/copy_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/copy_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/copy_loongarch.hpp b/src/hotspot/cpu/loongarch/copy_loongarch.hpp +new file mode 100644 +index 00000000000..4ed4766e6e2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/copy_loongarch.hpp @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -15255,9 +15351,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#include OS_CPU_HEADER_INLINE(copy) + +#endif //CPU_LOONGARCH_COPY_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp +new file mode 100644 +index 00000000000..6fdd1bd1915 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/disassembler_loongarch.hpp @@ -0,0 +1,49 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -15308,9 +15406,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + static void annotate(address pc, outputStream* st) { }; + +#endif // CPU_LOONGARCH_DISASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp b/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp b/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp +new file mode 100644 +index 00000000000..4f936060b6b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp @@ -0,0 +1,360 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -15672,9 +15772,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + __ flush(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp +new file mode 100644 +index 00000000000..c0837e64d80 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.cpp @@ -0,0 +1,195 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -15871,9 +15973,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp +new file mode 100644 +index 00000000000..7e4d0d79e44 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/foreignGlobals_loongarch.hpp @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -15925,9 +16029,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_FOREIGN_GLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/frame_loongarch.cpp b/src/hotspot/cpu/loongarch/frame_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/frame_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/frame_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.cpp b/src/hotspot/cpu/loongarch/frame_loongarch.cpp +new file mode 100644 +index 00000000000..b2c3d9e02f1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.cpp @@ -0,0 +1,626 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -16555,9 +16661,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + _last_Java_pc = (address)_last_Java_sp[-1]; + vmassert(walkable(), "something went wrong"); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/frame_loongarch.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/frame_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/frame_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.hpp +new file mode 100644 +index 00000000000..36dd89ff08f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.hpp @@ -0,0 +1,200 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -16759,9 +16867,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + inline frame sender_raw(RegisterMap* map) const; + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp +new file mode 100644 +index 00000000000..a740b3b1df3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/frame_loongarch.inline.hpp @@ -0,0 +1,472 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -17235,9 +17345,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_FRAME_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..fd125f141f4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.cpp @@ -0,0 +1,491 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17730,9 +17842,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#undef __ + +#endif // COMPILER1 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..b3725301da2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1BarrierSetAssembler_loongarch.hpp @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -17806,9 +17920,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_G1_G1BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp +new file mode 100644 +index 00000000000..44b7ff1485f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/g1/g1Globals_loongarch.hpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -17840,9 +17956,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +const size_t G1MergeHeapRootsPrefetchCacheSize = 8; + +#endif // CPU_LOONGARCH_GC_G1_G1GLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..8b45eb5131c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.cpp @@ -0,0 +1,453 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18297,9 +18415,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ load_klass(obj, obj); // get klass + __ beqz(obj, error); // if klass is null it is broken +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..0562518663f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetAssembler_loongarch.hpp @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18448,9 +18568,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_SHARED_BARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp +new file mode 100644 +index 00000000000..6fd8fac976c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/barrierSetNMethod_loongarch.cpp @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18674,9 +18796,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + return barrier.check_barrier(msg); +} +#endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..d04be97df4c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18795,9 +18919,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..bd91d0623db +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/cardTableBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18843,9 +18969,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..53799c0678a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18900,9 +19028,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..825a8f9d0ea +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shared/modRefBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved. @@ -18958,9 +19088,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_SHARED_MODREFBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp +new file mode 100644 +index 00000000000..1fd8cff3904 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -19092,9 +19224,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + return result; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..d9377db5503 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,783 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -19879,9 +20013,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#undef __ + +#endif // COMPILER1 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..133bbbb0b89 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. @@ -19971,9 +20107,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad ---- a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad +new file mode 100644 +index 00000000000..2608ef13576 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoah_loongarch_64.ad @@ -0,0 +1,232 @@ +// +// Copyright (c) 2018, Red Hat, Inc. All rights reserved. @@ -20207,9 +20345,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + ins_pipe(pipe_slow); +%} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..0be4ef7c6bc +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,471 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -20682,9 +20822,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#undef __ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..dfe62190ff6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/x/xBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -20791,9 +20933,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_X_XBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp +new file mode 100644 +index 00000000000..2acac4cfd31 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.cpp @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved. @@ -21006,9 +21150,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +size_t XPlatformAddressMetadataShift() { + return XPlatformAddressOffsetBits(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp +new file mode 100644 +index 00000000000..3134c3d07f8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/x/xGlobals_loongarch.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2015, 2021, Oracle and/or its affiliates. All rights reserved. @@ -21044,9 +21190,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +size_t XPlatformAddressMetadataShift(); + +#endif // CPU_LOONGARCH_GC_X_XGLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad ---- a/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad +new file mode 100644 +index 00000000000..c4e77f08b4f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/x/x_loongarch_64.ad @@ -0,0 +1,256 @@ +// +// Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -21304,9 +21452,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + ins_pipe(pipe_slow); +%} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp 2024-02-20 10:42:36.155530119 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp +new file mode 100644 +index 00000000000..9caa23354c1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.cpp @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2017, 2022, Oracle and/or its affiliates. All rights reserved. @@ -21417,9 +21567,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +void ZGlobalsPointers::pd_set_good_masks() { + BarrierSetAssembler::clear_patching_epoch(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp +new file mode 100644 +index 00000000000..8f82152db59 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.hpp @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -21456,9 +21608,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +size_t ZPlatformAddressHeapBaseShift(); + +#endif // CPU_LOONGARCH64_GC_Z_ZADDRESS_LOONGARCH64_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp +new file mode 100644 +index 00000000000..93ea4144072 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zAddress_loongarch.inline.hpp @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. @@ -21498,9 +21652,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH64_GC_Z_ZADDRESS_LOONGARCH64_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..427a6f9c24a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.cpp @@ -0,0 +1,1226 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -22728,9 +22884,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // COMPILER2 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..754f042f749 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zBarrierSetAssembler_loongarch.hpp @@ -0,0 +1,192 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -22924,9 +23082,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_GC_Z_ZBARRIERSETASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp +new file mode 100644 +index 00000000000..3e012e31420 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/zGlobals_loongarch.hpp @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2015, 2021, Oracle and/or its affiliates. All rights reserved. @@ -22958,9 +23118,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +const size_t ZPlatformCacheLineSize = 64; + +#endif // CPU_LOONGARCH_GC_Z_ZGLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad ---- a/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad +new file mode 100644 +index 00000000000..7a50810acda +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/gc/z/z_loongarch_64.ad @@ -0,0 +1,250 @@ +// +// Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -23212,10 +23374,12 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + ins_pipe(pipe_slow); +%} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,55 @@ +diff --git a/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp +new file mode 100644 +index 00000000000..441882dcaa0 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globalDefinitions_loongarch.hpp +@@ -0,0 +1,57 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. @@ -23270,10 +23434,14 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + +#define USE_POINTERS_TO_REGISTER_IMPL_ARRAY + ++#define DEFAULT_CACHE_LINE_SIZE 64 ++ +#endif // CPU_LOONGARCH_GLOBALDEFINITIONS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/globals_loongarch.hpp b/src/hotspot/cpu/loongarch/globals_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/globals_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/globals_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/globals_loongarch.hpp b/src/hotspot/cpu/loongarch/globals_loongarch.hpp +new file mode 100644 +index 00000000000..e38b0401bee +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/globals_loongarch.hpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -23400,9 +23568,99 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +// end of ARCH_FLAGS + +#endif // CPU_LOONGARCH_GLOBALS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/icache_loongarch.cpp b/src/hotspot/cpu/loongarch/icache_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/icache_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/icache_loongarch.cpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +new file mode 100644 +index 00000000000..c53d50d78f6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp +@@ -0,0 +1,82 @@ ++/* ++ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "asm/macroAssembler.inline.hpp" ++#include "code/icBuffer.hpp" ++#include "gc/shared/collectedHeap.inline.hpp" ++#include "interpreter/bytecodes.hpp" ++#include "memory/resourceArea.hpp" ++#include "nativeInst_loongarch.hpp" ++#include "oops/oop.inline.hpp" ++ ++ ++int InlineCacheBuffer::ic_stub_code_size() { ++ return NativeMovConstReg::instruction_size + // patchable_li52() == 3 ins ++ NativeGeneralJump::instruction_size; // patchable_jump() == 2 ins ++} ++ ++ ++// The use IC_Klass refer to SharedRuntime::gen_i2c2i_adapters ++void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, ++ void* cached_value, ++ address entry_point) { ++ ResourceMark rm; ++ CodeBuffer code(code_begin, ic_stub_code_size()); ++ MacroAssembler* masm = new MacroAssembler(&code); ++ // Note: even though the code contains an embedded value, we do not need reloc info ++ // because ++ // (1) the value is old (i.e., doesn't matter for scavenges) ++ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear ++ ++#define __ masm-> ++ address start = __ pc(); ++ __ patchable_li52(IC_Klass, (long)cached_value); ++ __ jmp(entry_point, relocInfo::runtime_call_type); ++ ++ ICache::invalidate_range(code_begin, InlineCacheBuffer::ic_stub_code_size()); ++ assert(__ pc() - start == ic_stub_code_size(), "must be"); ++#undef __ ++} ++ ++ ++address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { ++ // move -> jump -> entry ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ return jump->jump_destination(); ++} ++ ++ ++void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { ++ // double check the instructions flow ++ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); ++ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ ++ // cached value is the data arg of NativeMovConstReg ++ void* cached_value = (void*)move->data(); ++ return cached_value; ++} +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.cpp b/src/hotspot/cpu/loongarch/icache_loongarch.cpp +new file mode 100644 +index 00000000000..59906711428 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.cpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -23446,9 +23704,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + *flush_icache_stub = (ICache::flush_icache_stub_t)start; +#undef __ +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/icache_loongarch.hpp b/src/hotspot/cpu/loongarch/icache_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/icache_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/icache_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/icache_loongarch.hpp b/src/hotspot/cpu/loongarch/icache_loongarch.hpp +new file mode 100644 +index 00000000000..3a180549fc6 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/icache_loongarch.hpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. @@ -23491,13 +23751,15 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_ICACHE_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/icBuffer_loongarch.cpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,82 @@ +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +new file mode 100644 +index 00000000000..a632f7b881e +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp +@@ -0,0 +1,272 @@ +/* -+ * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -23520,67 +23782,259 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#include "precompiled.hpp" ++#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP ++ ++#include "asm/assembler.hpp" +#include "asm/macroAssembler.hpp" +#include "asm/macroAssembler.inline.hpp" -+#include "code/icBuffer.hpp" -+#include "gc/shared/collectedHeap.inline.hpp" -+#include "interpreter/bytecodes.hpp" -+#include "memory/resourceArea.hpp" -+#include "nativeInst_loongarch.hpp" -+#include "oops/oop.inline.hpp" ++#include "interpreter/invocationCounter.hpp" ++#include "runtime/frame.hpp" + ++// This file specializes the assembler with interpreter-specific macros + -+int InlineCacheBuffer::ic_stub_code_size() { -+ return NativeMovConstReg::instruction_size + // patchable_li52() == 3 ins -+ NativeGeneralJump::instruction_size; // patchable_jump() == 2 ins -+} ++typedef ByteSize (*OffsetFunction)(uint); + ++class InterpreterMacroAssembler: public MacroAssembler { ++ private: + -+// The use IC_Klass refer to SharedRuntime::gen_i2c2i_adapters -+void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, -+ void* cached_value, -+ address entry_point) { -+ ResourceMark rm; -+ CodeBuffer code(code_begin, ic_stub_code_size()); -+ MacroAssembler* masm = new MacroAssembler(&code); -+ // Note: even though the code contains an embedded value, we do not need reloc info -+ // because -+ // (1) the value is old (i.e., doesn't matter for scavenges) -+ // (2) these ICStubs are removed *before* a GC happens, so the roots disappear ++ Register _locals_register; // register that contains the pointer to the locals ++ Register _bcp_register; // register that contains the bcp + -+#define __ masm-> -+ address start = __ pc(); -+ __ patchable_li52(IC_Klass, (long)cached_value); -+ __ jmp(entry_point, relocInfo::runtime_call_type); ++ protected: ++ // Interpreter specific version of call_VM_base ++ virtual void call_VM_leaf_base(address entry_point, ++ int number_of_arguments); + -+ ICache::invalidate_range(code_begin, InlineCacheBuffer::ic_stub_code_size()); -+ assert(__ pc() - start == ic_stub_code_size(), "must be"); -+#undef __ -+} ++ virtual void call_VM_base(Register oop_result, ++ Register java_thread, ++ Register last_java_sp, ++ address entry_point, ++ int number_of_arguments, ++ bool check_exceptions); + ++ // base routine for all dispatches ++ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); + -+address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { -+ // move -> jump -> entry -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); -+ return jump->jump_destination(); -+} ++ public: ++ void jump_to_entry(address entry); ++ // narrow int return value ++ void narrow(Register result); + ++ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} + -+void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) { -+ // double check the instructions flow -+ NativeMovConstReg* move = nativeMovConstReg_at(code_begin); -+ NativeGeneralJump* jump = nativeGeneralJump_at(move->next_instruction_address()); ++ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); ++ void get_4_byte_integer_at_bcp(Register reg, int offset); + -+ // cached value is the data arg of NativeMovConstReg -+ void* cached_value = (void*)move->data(); -+ return cached_value; -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,1963 @@ ++ virtual void check_and_handle_popframe(Register java_thread); ++ virtual void check_and_handle_earlyret(Register java_thread); ++ ++ void load_earlyret_value(TosState state); ++ ++ // Interpreter-specific registers ++ void save_bcp() { ++ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_bcp() { ++ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); ++ } ++ ++ void restore_locals() { ++ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); ++ alsl_d(LVP, LVP, FP, LogBytesPerWord-1); ++ } ++ ++ void get_dispatch(); ++ ++ // Helpers for runtime call arguments/results ++ void get_method(Register reg) { ++ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); ++ } ++ ++ void get_const(Register reg){ ++ get_method(reg); ++ ld_d(reg, reg, in_bytes(Method::const_offset())); ++ } ++ ++ void get_constant_pool(Register reg) { ++ get_const(reg); ++ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); ++ } ++ ++ void get_constant_pool_cache(Register reg) { ++ get_constant_pool(reg); ++ ld_d(reg, reg, in_bytes(ConstantPool::cache_offset())); ++ } ++ ++ void get_cpool_and_tags(Register cpool, Register tags) { ++ get_constant_pool(cpool); ++ ld_d(tags, cpool, in_bytes(ConstantPool::tags_offset())); ++ } ++ ++ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); ++ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); ++ void get_method_counters(Register method, Register mcs, Label& skip); ++ ++ void load_resolved_indy_entry(Register cache, Register index); ++ ++ // load cpool->resolved_references(index); ++ void load_resolved_reference_at_index(Register result, Register index, Register tmp); ++ ++ // load cpool->resolved_klass_at(index) ++ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) ++ Register index, // the constant pool index (corrupted on return) ++ Register klass); // contains the Klass on return ++ ++ void load_resolved_method_at_index(int byte_no, ++ Register method, ++ Register cache, ++ Register index); ++ ++ void pop_ptr( Register r = FSR); ++ void pop_i( Register r = FSR); ++ void pop_l( Register r = FSR); ++ void pop_f(FloatRegister r = FSF); ++ void pop_d(FloatRegister r = FSF); ++ ++ void push_ptr( Register r = FSR); ++ void push_i( Register r = FSR); ++ void push_l( Register r = FSR); ++ void push_f(FloatRegister r = FSF); ++ void push_d(FloatRegister r = FSF); ++ ++ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } ++ ++ void push(Register r ) { ((MacroAssembler*)this)->push(r); } ++ ++ void pop(TosState state); // transition vtos -> state ++ void push(TosState state); // transition state -> vtos ++ ++ void empty_expression_stack() { ++ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); ++ // null last_sp until next java call ++ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); ++ } ++ ++ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls ++ void load_ptr(int n, Register val); ++ void store_ptr(int n, Register val); ++ ++ // Generate a subtype check: branch to ok_is_subtype if sub_klass is ++ // a subtype of super_klass. ++ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); ++ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); ++ ++ // Dispatching ++ void dispatch_prolog(TosState state, int step = 0); ++ void dispatch_epilog(TosState state, int step = 0); ++ void dispatch_only(TosState state, bool generate_poll = false); ++ void dispatch_only_normal(TosState state); ++ void dispatch_only_noverify(TosState state); ++ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); ++ void dispatch_via (TosState state, address* table); ++ ++ // jump to an invoked target ++ void prepare_to_jump_from_interpreted(); ++ void jump_from_interpreted(Register method); ++ ++ ++ // Returning from interpreted functions ++ // ++ // Removes the current activation (incl. unlocking of monitors) ++ // and sets up the return address. This code is also used for ++ // exception unwindwing. In that case, we do not want to throw ++ // IllegalMonitorStateExceptions, since that might get us into an ++ // infinite rethrow exception loop. ++ // Additionally this code is used for popFrame and earlyReturn. ++ // In popFrame case we want to skip throwing an exception, ++ // installing an exception, and notifying jvmdi. ++ // In earlyReturn case we only want to skip throwing an exception ++ // and installing an exception. ++ void remove_activation(TosState state, ++ bool throw_monitor_exception = true, ++ bool install_monitor_exception = true, ++ bool notify_jvmdi = true); ++ ++ // Object locking ++ void lock_object (Register lock_reg); ++ void unlock_object(Register lock_reg); ++ ++ // Interpreter profiling operations ++ void set_method_data_pointer_for_bcp(); ++ void test_method_data_pointer(Register mdp, Label& zero_continue); ++ void verify_method_data_pointer(); ++ ++ void set_mdp_data_at(Register mdp_in, int constant, Register value); ++ void increment_mdp_data_at(Register mdp_in, int constant, ++ bool decrement = false); ++ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, ++ bool decrement = false); ++ void increment_mask_and_jump(Address counter_addr, ++ int increment, Address mask, ++ Register scratch, bool preloaded, ++ Condition cond, Label* where); ++ void set_mdp_flag_at(Register mdp_in, int flag_constant); ++ void test_mdp_data_at(Register mdp_in, int offset, Register value, ++ Register test_value_out, ++ Label& not_equal_continue); ++ ++ void record_klass_in_profile(Register receiver, Register mdp, ++ Register reg2, bool is_virtual_call); ++ void record_klass_in_profile_helper(Register receiver, Register mdp, ++ Register reg2, int start_row, ++ Label& done, bool is_virtual_call); ++ ++ void record_item_in_profile_helper(Register item, Register mdp, ++ Register reg2, int start_row, Label& done, int total_rows, ++ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, ++ int non_profiled_offset); ++ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); ++ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); ++ void update_mdp_by_constant(Register mdp_in, int constant); ++ void update_mdp_for_ret(Register return_bci); ++ ++ void profile_taken_branch(Register mdp, Register bumped_count); ++ void profile_not_taken_branch(Register mdp); ++ void profile_call(Register mdp); ++ void profile_final_call(Register mdp); ++ void profile_virtual_call(Register receiver, Register mdp, ++ Register scratch2, ++ bool receiver_can_be_null = false); ++ void profile_ret(Register return_bci, Register mdp); ++ void profile_null_seen(Register mdp); ++ void profile_typecheck(Register mdp, Register klass, Register scratch); ++ void profile_typecheck_failed(Register mdp); ++ void profile_switch_default(Register mdp); ++ void profile_switch_case(Register index_in_scratch, Register mdp, ++ Register scratch2); ++ ++ // Debugging ++ // only if +VerifyFPU && (state == ftos || state == dtos) ++ void verify_FPU(int stack_depth, TosState state = ftos); ++ ++ void profile_obj_type(Register obj, const Address& mdo_addr); ++ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); ++ void profile_return_type(Register mdp, Register ret, Register tmp); ++ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ ++ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ ++ // support for jvmti/dtrace ++ void notify_method_entry(); ++ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++}; ++ ++#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +new file mode 100644 +index 00000000000..3790af7406c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp +@@ -0,0 +1,1965 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. @@ -25164,6 +25618,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + +void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& mdo_addr) { ++ assert_different_registers(obj, AT, T5, mdo_addr.base(), mdo_addr.index()); + Label update, next, none; + + verify_oop(obj); @@ -25202,25 +25657,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + xorr(obj, obj, AT); + + assert(TypeEntries::type_klass_mask == -4, "must be"); -+ bstrpick_d(AT, obj, 63, 2); -+ beqz(AT, next); ++ bstrpick_d(T5, obj, 63, 2); ++ beqz(T5, next); + -+ andi(AT, obj, TypeEntries::type_unknown); -+ bnez(AT, next); ++ andi(T5, obj, TypeEntries::type_unknown); ++ bnez(T5, next); + -+ if (mdo_addr.index() == noreg) { -+ ld_d(AT, mdo_addr); -+ } else { -+ ld_d(AT, T0, mdo_addr.disp()); -+ } + beqz(AT, none); + -+ addi_d(AT, AT, -(TypeEntries::null_seen)); -+ beqz(AT, none); ++ addi_d(T5, AT, -(TypeEntries::null_seen)); ++ beqz(T5, none); + -+ // There is a chance that the checks above (re-reading profiling -+ // data from memory) fail if another thread has just set the ++ // There is a chance that the checks above ++ // fail if another thread has just set the + // profiling to this obj's klass ++ xorr(obj, obj, AT); // get back original value before XOR + if (mdo_addr.index() == noreg) { + ld_d(AT, mdo_addr); + } else { @@ -25252,6 +25703,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } else { + st_d(obj, T0, mdo_addr.disp()); + } ++#ifdef ASSERT ++ assert(TypeEntries::type_mask == -2, "must be"); ++ bstrpick_d(obj, obj, 63, 1); ++ verify_klass_ptr(obj); ++#endif + + bind(next); + if (mdo_addr.index() != noreg) { @@ -25544,13 +26000,15 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + unimplemented(); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,272 @@ +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +new file mode 100644 +index 00000000000..d53d951a160 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp +@@ -0,0 +1,62 @@ +/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -25573,256 +26031,48 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#ifndef CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -+ -+#include "asm/assembler.hpp" -+#include "asm/macroAssembler.hpp" -+#include "asm/macroAssembler.inline.hpp" -+#include "interpreter/invocationCounter.hpp" -+#include "runtime/frame.hpp" ++#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP ++#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP + -+// This file specializes the assembler with interpreter-specific macros ++// This is included in the middle of class Interpreter. ++// Do not include files here. + -+typedef ByteSize (*OffsetFunction)(uint); ++// native method calls + -+class InterpreterMacroAssembler: public MacroAssembler { ++class SignatureHandlerGenerator: public NativeSignatureIterator { + private: ++ MacroAssembler* _masm; ++ unsigned int _num_fp_args; ++ unsigned int _num_int_args; ++ int _stack_offset; + -+ Register _locals_register; // register that contains the pointer to the locals -+ Register _bcp_register; // register that contains the bcp -+ -+ protected: -+ // Interpreter specific version of call_VM_base -+ virtual void call_VM_leaf_base(address entry_point, -+ int number_of_arguments); -+ -+ virtual void call_VM_base(Register oop_result, -+ Register java_thread, -+ Register last_java_sp, -+ address entry_point, -+ int number_of_arguments, -+ bool check_exceptions); -+ -+ // base routine for all dispatches -+ void dispatch_base(TosState state, address* table, bool verifyoop = true, bool generate_poll = false); ++ void move(int from_offset, int to_offset); ++ void box(int from_offset, int to_offset); ++ void pass_int(); ++ void pass_long(); ++ void pass_object(); ++ void pass_float(); ++ void pass_double(); + + public: -+ void jump_to_entry(address entry); -+ // narrow int return value -+ void narrow(Register result); -+ -+ InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code), _locals_register(LVP), _bcp_register(BCP) {} -+ -+ void get_2_byte_integer_at_bcp(Register reg, Register tmp, int offset); -+ void get_4_byte_integer_at_bcp(Register reg, int offset); -+ -+ virtual void check_and_handle_popframe(Register java_thread); -+ virtual void check_and_handle_earlyret(Register java_thread); -+ -+ void load_earlyret_value(TosState state); -+ -+ // Interpreter-specific registers -+ void save_bcp() { -+ st_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_bcp() { -+ ld_d(BCP, FP, frame::interpreter_frame_bcp_offset * wordSize); -+ } -+ -+ void restore_locals() { -+ ld_d(LVP, FP, frame::interpreter_frame_locals_offset * wordSize); -+ alsl_d(LVP, LVP, FP, LogBytesPerWord-1); -+ } -+ -+ void get_dispatch(); -+ -+ // Helpers for runtime call arguments/results -+ void get_method(Register reg) { -+ ld_d(reg, FP, frame::interpreter_frame_method_offset * wordSize); -+ } -+ -+ void get_const(Register reg){ -+ get_method(reg); -+ ld_d(reg, reg, in_bytes(Method::const_offset())); -+ } -+ -+ void get_constant_pool(Register reg) { -+ get_const(reg); -+ ld_d(reg, reg, in_bytes(ConstMethod::constants_offset())); -+ } -+ -+ void get_constant_pool_cache(Register reg) { -+ get_constant_pool(reg); -+ ld_d(reg, reg, in_bytes(ConstantPool::cache_offset())); -+ } -+ -+ void get_cpool_and_tags(Register cpool, Register tags) { -+ get_constant_pool(cpool); -+ ld_d(tags, cpool, in_bytes(ConstantPool::tags_offset())); -+ } -+ -+ void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); -+ void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); -+ void get_method_counters(Register method, Register mcs, Label& skip); -+ -+ void load_resolved_indy_entry(Register cache, Register index); -+ -+ // load cpool->resolved_references(index); -+ void load_resolved_reference_at_index(Register result, Register index, Register tmp); -+ -+ // load cpool->resolved_klass_at(index) -+ void load_resolved_klass_at_index(Register cpool, // the constant pool (corrupted on return) -+ Register index, // the constant pool index (corrupted on return) -+ Register klass); // contains the Klass on return -+ -+ void load_resolved_method_at_index(int byte_no, -+ Register method, -+ Register cache, -+ Register index); -+ -+ void pop_ptr( Register r = FSR); -+ void pop_i( Register r = FSR); -+ void pop_l( Register r = FSR); -+ void pop_f(FloatRegister r = FSF); -+ void pop_d(FloatRegister r = FSF); -+ -+ void push_ptr( Register r = FSR); -+ void push_i( Register r = FSR); -+ void push_l( Register r = FSR); -+ void push_f(FloatRegister r = FSF); -+ void push_d(FloatRegister r = FSF); -+ -+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } -+ -+ void push(Register r ) { ((MacroAssembler*)this)->push(r); } -+ -+ void pop(TosState state); // transition vtos -> state -+ void push(TosState state); // transition state -> vtos -+ -+ void empty_expression_stack() { -+ ld_d(SP, FP, frame::interpreter_frame_monitor_block_top_offset * wordSize); -+ // null last_sp until next java call -+ st_d(R0, FP, frame::interpreter_frame_last_sp_offset * wordSize); -+ } -+ -+ // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls -+ void load_ptr(int n, Register val); -+ void store_ptr(int n, Register val); -+ -+ // Generate a subtype check: branch to ok_is_subtype if sub_klass is -+ // a subtype of super_klass. -+ //void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); -+ void gen_subtype_check( Register Rsup_klass, Register sub_klass, Label &ok_is_subtype ); -+ -+ // Dispatching -+ void dispatch_prolog(TosState state, int step = 0); -+ void dispatch_epilog(TosState state, int step = 0); -+ void dispatch_only(TosState state, bool generate_poll = false); -+ void dispatch_only_normal(TosState state); -+ void dispatch_only_noverify(TosState state); -+ void dispatch_next(TosState state, int step = 0, bool generate_poll = false); -+ void dispatch_via (TosState state, address* table); -+ -+ // jump to an invoked target -+ void prepare_to_jump_from_interpreted(); -+ void jump_from_interpreted(Register method); -+ -+ -+ // Returning from interpreted functions -+ // -+ // Removes the current activation (incl. unlocking of monitors) -+ // and sets up the return address. This code is also used for -+ // exception unwindwing. In that case, we do not want to throw -+ // IllegalMonitorStateExceptions, since that might get us into an -+ // infinite rethrow exception loop. -+ // Additionally this code is used for popFrame and earlyReturn. -+ // In popFrame case we want to skip throwing an exception, -+ // installing an exception, and notifying jvmdi. -+ // In earlyReturn case we only want to skip throwing an exception -+ // and installing an exception. -+ void remove_activation(TosState state, -+ bool throw_monitor_exception = true, -+ bool install_monitor_exception = true, -+ bool notify_jvmdi = true); -+ -+ // Object locking -+ void lock_object (Register lock_reg); -+ void unlock_object(Register lock_reg); -+ -+ // Interpreter profiling operations -+ void set_method_data_pointer_for_bcp(); -+ void test_method_data_pointer(Register mdp, Label& zero_continue); -+ void verify_method_data_pointer(); -+ -+ void set_mdp_data_at(Register mdp_in, int constant, Register value); -+ void increment_mdp_data_at(Register mdp_in, int constant, -+ bool decrement = false); -+ void increment_mdp_data_at(Register mdp_in, Register reg, int constant, -+ bool decrement = false); -+ void increment_mask_and_jump(Address counter_addr, -+ int increment, Address mask, -+ Register scratch, bool preloaded, -+ Condition cond, Label* where); -+ void set_mdp_flag_at(Register mdp_in, int flag_constant); -+ void test_mdp_data_at(Register mdp_in, int offset, Register value, -+ Register test_value_out, -+ Label& not_equal_continue); -+ -+ void record_klass_in_profile(Register receiver, Register mdp, -+ Register reg2, bool is_virtual_call); -+ void record_klass_in_profile_helper(Register receiver, Register mdp, -+ Register reg2, int start_row, -+ Label& done, bool is_virtual_call); -+ -+ void record_item_in_profile_helper(Register item, Register mdp, -+ Register reg2, int start_row, Label& done, int total_rows, -+ OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, -+ int non_profiled_offset); -+ void update_mdp_by_offset(Register mdp_in, int offset_of_offset); -+ void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); -+ void update_mdp_by_constant(Register mdp_in, int constant); -+ void update_mdp_for_ret(Register return_bci); -+ -+ void profile_taken_branch(Register mdp, Register bumped_count); -+ void profile_not_taken_branch(Register mdp); -+ void profile_call(Register mdp); -+ void profile_final_call(Register mdp); -+ void profile_virtual_call(Register receiver, Register mdp, -+ Register scratch2, -+ bool receiver_can_be_null = false); -+ void profile_ret(Register return_bci, Register mdp); -+ void profile_null_seen(Register mdp); -+ void profile_typecheck(Register mdp, Register klass, Register scratch); -+ void profile_typecheck_failed(Register mdp); -+ void profile_switch_default(Register mdp); -+ void profile_switch_case(Register index_in_scratch, Register mdp, -+ Register scratch2); -+ -+ // Debugging -+ // only if +VerifyFPU && (state == ftos || state == dtos) -+ void verify_FPU(int stack_depth, TosState state = ftos); -+ -+ void profile_obj_type(Register obj, const Address& mdo_addr); -+ void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); -+ void profile_return_type(Register mdp, Register ret, Register tmp); -+ void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); ++ // Creation ++ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); + -+ typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; ++ // Code generation ++ void generate(uint64_t fingerprint); + -+ // support for jvmti/dtrace -+ void notify_method_entry(); -+ void notify_method_exit(TosState state, NotifyMethodExitMode mode); ++ // Code generation support ++ static Register from(); ++ static Register to(); ++ static Register temp(); +}; + -+#endif // CPU_LOONGARCH_INTERP_MASM_LOONGARCH_64_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp 2024-02-20 10:42:36.158863448 +0800 ++#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp +new file mode 100644 +index 00000000000..46e634599e7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch_64.cpp @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -26088,75 +26338,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + // return result handler + return Interpreter::result_handler(m->result_type()); +JRT_END -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/interpreterRT_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,62 @@ -+/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+#define CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -+ -+// This is included in the middle of class Interpreter. -+// Do not include files here. -+ -+// native method calls -+ -+class SignatureHandlerGenerator: public NativeSignatureIterator { -+ private: -+ MacroAssembler* _masm; -+ unsigned int _num_fp_args; -+ unsigned int _num_int_args; -+ int _stack_offset; -+ -+ void move(int from_offset, int to_offset); -+ void box(int from_offset, int to_offset); -+ void pass_int(); -+ void pass_long(); -+ void pass_object(); -+ void pass_float(); -+ void pass_double(); -+ -+ public: -+ // Creation -+ SignatureHandlerGenerator(const methodHandle& method, CodeBuffer* buffer); -+ -+ // Code generation -+ void generate(uint64_t fingerprint); -+ -+ // Code generation support -+ static Register from(); -+ static Register to(); -+ static Register temp(); -+}; -+ -+#endif // CPU_LOONGARCH_INTERPRETERRT_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp +new file mode 100644 +index 00000000000..b912250dce2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/javaFrameAnchor_loongarch.hpp @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved. @@ -26244,9 +26430,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; } + +#endif // CPU_LOONGARCH_JAVAFRAMEANCHOR_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp +new file mode 100644 +index 00000000000..8e8e548e610 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniFastGetField_loongarch_64.cpp @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. @@ -26427,9 +26615,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +address JNI_FastGetField::generate_fast_get_double_field() { + return generate_fast_get_int_field0(T_DOUBLE); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp +new file mode 100644 +index 00000000000..3388ddb9db7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jniTypes_loongarch.hpp @@ -0,0 +1,143 @@ +/* + * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. @@ -26574,9 +26764,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_JNITYPES_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp +new file mode 100644 +index 00000000000..1a983e338a4 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/jvmciCodeInstaller_loongarch.cpp @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -26772,10 +26964,43 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +bool CodeInstaller::is_general_purpose_reg(VMReg hotspotRegister) { + return !hotspotRegister->is_FloatRegister(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/loongarch_64.ad b/src/hotspot/cpu/loongarch/loongarch_64.ad ---- a/src/hotspot/cpu/loongarch/loongarch_64.ad 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/loongarch_64.ad 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,15770 @@ +diff --git a/src/hotspot/cpu/loongarch/loongarch.ad b/src/hotspot/cpu/loongarch/loongarch.ad +new file mode 100644 +index 00000000000..80dff0c7626 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch.ad +@@ -0,0 +1,25 @@ ++// ++// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. ++// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. ++// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++// ++// This code is free software; you can redistribute it and/or modify it ++// under the terms of the GNU General Public License version 2 only, as ++// published by the Free Software Foundation. ++// ++// This code is distributed in the hope that it will be useful, but WITHOUT ++// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++// version 2 for more details (a copy is included in the LICENSE file that ++// accompanied this code). ++// ++// You should have received a copy of the GNU General Public License version ++// 2 along with this work; if not, write to the Free Software Foundation, ++// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++// ++// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++// or visit www.oracle.com if you need additional information or have any ++// questions. ++// ++// ++ +diff --git a/src/hotspot/cpu/loongarch/loongarch_64.ad b/src/hotspot/cpu/loongarch/loongarch_64.ad +new file mode 100644 +index 00000000000..366df18eb9c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/loongarch_64.ad +@@ -0,0 +1,15833 @@ +// +// Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. +// Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. @@ -31125,7 +31350,8 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +opclass memory_exclusive(indOffset16, indirect); + +opclass mRegLorI2L(mRegI2L, mRegL); -+opclass mRegIorL2I( mRegI, mRegL2I); ++opclass mRegIorL2I(mRegI, mRegL2I); ++opclass mRegLorP(mRegL, mRegP); + +//----------PIPELINE----------------------------------------------------------- +// Rules which define the behavior of the target architectures pipeline. @@ -35067,6 +35293,26 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + ins_pipe( pipe_slow ); +%} + ++instruct cmovD_cmpF_reg_reg(regD dst, regD src, regF tmp1, regF tmp2, cmpOp cop ) %{ ++ match(Set dst (CMoveD (Binary cop (CmpF tmp1 tmp2)) (Binary dst src))); ++ ins_cost(200); ++ format %{ ++ "CMP$cop $tmp1, $tmp2\t @cmovD_cmpF_reg_reg\n" ++ "\tCMOV $dst,$src \t @cmovD_cmpF_reg_reg" ++ %} ++ ins_encode %{ ++ FloatRegister reg_op1 = as_FloatRegister($tmp1$$reg); ++ FloatRegister reg_op2 = as_FloatRegister($tmp2$$reg); ++ FloatRegister dst = as_FloatRegister($dst$$reg); ++ FloatRegister src = as_FloatRegister($src$$reg); ++ int flag = $cop$$cmpcode; ++ ++ __ cmp_cmov(reg_op1, reg_op2, dst, src, (MacroAssembler::CMCompare) flag, true /* is_float */); ++ %} ++ ++ ins_pipe( pipe_slow ); ++%} ++ +instruct cmovF_cmpI_reg_reg(regF dst, regF src, mRegI tmp1, mRegI tmp2, cmpOp cop) %{ + match(Set dst (CMoveF (Binary cop (CmpI tmp1 tmp2)) (Binary dst src))); + ins_cost(200); @@ -35109,6 +35355,27 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + ins_pipe( pipe_slow ); +%} + ++instruct cmovF_cmpL_reg_reg(regF dst, regF src, mRegL tmp1, mRegL tmp2, cmpOp cop) %{ ++ match(Set dst (CMoveF (Binary cop (CmpL tmp1 tmp2)) (Binary dst src))); ++ ins_cost(200); ++ format %{ ++ "CMP$cop $tmp1, $tmp2\t @cmovF_cmpL_reg_reg\n" ++ "\tCMOV $dst, $src \t @cmovF_cmpL_reg_reg" ++ %} ++ ++ ins_encode %{ ++ Register op1 = $tmp1$$Register; ++ Register op2 = $tmp2$$Register; ++ FloatRegister dst = as_FloatRegister($dst$$reg); ++ FloatRegister src = as_FloatRegister($src$$reg); ++ int flag = $cop$$cmpcode; ++ ++ __ cmp_cmov(op1, op2, dst, src, (MacroAssembler::CMCompare) flag); ++ %} ++ ++ ins_pipe( pipe_slow ); ++%} ++ +instruct cmovD_cmpI_reg_reg(regD dst, regD src, mRegI tmp1, mRegI tmp2, cmpOp cop) %{ + match(Set dst (CMoveD (Binary cop (CmpI tmp1 tmp2)) (Binary dst src))); + ins_cost(200); @@ -35130,12 +35397,13 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + ins_pipe( pipe_slow ); +%} + -+instruct cmovD_cmpP_reg_reg(regD dst, regD src, mRegP tmp1, mRegP tmp2, cmpOp cop) %{ ++instruct cmovD_cmpLorP_reg_reg(regD dst, regD src, mRegLorP tmp1, mRegLorP tmp2, cmpOp cop) %{ + match(Set dst (CMoveD (Binary cop (CmpP tmp1 tmp2)) (Binary dst src))); ++ match(Set dst (CMoveD (Binary cop (CmpL tmp1 tmp2)) (Binary dst src))); + ins_cost(200); + format %{ -+ "CMP$cop $tmp1, $tmp2\t @cmovD_cmpP_reg_reg\n" -+ "\tCMOV $dst, $src \t @cmovD_cmpP_reg_reg" ++ "CMP$cop $tmp1, $tmp2\t @cmovD_cmpLorP_reg_reg\n" ++ "\tCMOV $dst, $src \t @cmovD_cmpLorP_reg_reg" + %} + + ins_encode %{ @@ -35197,6 +35465,26 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + ins_pipe( pipe_slow ); +%} + ++instruct cmovF_cmpD_reg_reg(regF dst, regF src, regD tmp1, regD tmp2, cmpOp cop ) %{ ++ match(Set dst (CMoveF (Binary cop (CmpD tmp1 tmp2)) (Binary dst src))); ++ ins_cost(200); ++ format %{ ++ "CMP$cop $tmp1, $tmp2\t @cmovF_cmpD_reg_reg\n" ++ "\tCMOV $dst,$src \t @cmovF_cmpD_reg_reg" ++ %} ++ ++ ins_encode %{ ++ FloatRegister reg_op1 = $tmp1$$FloatRegister; ++ FloatRegister reg_op2 = $tmp2$$FloatRegister; ++ FloatRegister dst = $dst$$FloatRegister; ++ FloatRegister src = $src$$FloatRegister; ++ int flag = $cop$$cmpcode; ++ ++ __ cmp_cmov(reg_op1, reg_op2, dst, src, (MacroAssembler::CMCompare) flag, false /* is_float */); ++ %} ++ ins_pipe( pipe_slow ); ++%} ++ +// Manifest a CmpL result in an integer register. Very painful. +// This is the test to avoid. +instruct cmpL3_reg_zero(mRegI dst, mRegL src1, immL_0 zero) %{ @@ -42546,128 +42834,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +// These must follow all instruction definitions as they use the names +// defined in the instructions definitions. + -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/loongarch.ad b/src/hotspot/cpu/loongarch/loongarch.ad ---- a/src/hotspot/cpu/loongarch/loongarch.ad 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/loongarch.ad 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,25 @@ -+// -+// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. -+// Copyright (c) 2015, 2021, Loongson Technology. All rights reserved. -+// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+// -+// This code is free software; you can redistribute it and/or modify it -+// under the terms of the GNU General Public License version 2 only, as -+// published by the Free Software Foundation. -+// -+// This code is distributed in the hope that it will be useful, but WITHOUT -+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+// version 2 for more details (a copy is included in the LICENSE file that -+// accompanied this code). -+// -+// You should have received a copy of the GNU General Public License version -+// 2 along with this work; if not, write to the Free Software Foundation, -+// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+// -+// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+// or visit www.oracle.com if you need additional information or have any -+// questions. -+// -+// -+ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp ---- a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp 2024-02-20 10:42:36.158863448 +0800 -@@ -0,0 +1,86 @@ -+/* -+ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+ -+#include "asm/assembler.hpp" -+#include "asm/assembler.inline.hpp" -+#include "macroAssembler_loongarch.hpp" -+#include "memory/resourceArea.hpp" -+#include "runtime/stubRoutines.hpp" -+ -+/** -+ * Perform the quarter round calculations on values contained within -+ * four SIMD registers. -+ * -+ * @param aVec the SIMD register containing only the "a" values -+ * @param bVec the SIMD register containing only the "b" values -+ * @param cVec the SIMD register containing only the "c" values -+ * @param dVec the SIMD register containing only the "d" values -+ */ -+void MacroAssembler::cc20_quarter_round(FloatRegister aVec, FloatRegister bVec, -+ FloatRegister cVec, FloatRegister dVec) { -+ -+ // a += b, d ^= a, d <<<= 16 -+ vadd_w(aVec, aVec, bVec); -+ vxor_v(dVec, dVec, aVec); -+ vrotri_w(dVec, dVec, 16); -+ -+ // c += d, b ^= c, b <<<= 12 -+ vadd_w(cVec, cVec, dVec); -+ vxor_v(bVec, bVec, cVec); -+ vrotri_w(bVec, bVec, 20); -+ -+ // a += b, d ^= a, d <<<= 8 -+ vadd_w(aVec, aVec, bVec); -+ vxor_v(dVec, dVec, aVec); -+ vrotri_w(dVec, dVec, 24); -+ -+ // c += d, b ^= c, b <<<= 7 -+ vadd_w(cVec, cVec, dVec); -+ vxor_v(bVec, bVec, cVec); -+ vrotri_w(bVec, bVec, 25); -+} -+ -+/** -+ * Shift the b, c, and d vectors between columnar and diagonal representations. -+ * Note that the "a" vector does not shift. -+ * -+ * @param bVec the SIMD register containing only the "b" values -+ * @param cVec the SIMD register containing only the "c" values -+ * @param dVec the SIMD register containing only the "d" values -+ * @param colToDiag true if moving columnar to diagonal, false if -+ * moving diagonal back to columnar. -+ */ -+void MacroAssembler::cc20_shift_lane_org(FloatRegister bVec, FloatRegister cVec, -+ FloatRegister dVec, bool colToDiag) { -+ int bShift = colToDiag ? 0b00111001 : 0b10010011; -+ int cShift = 0b01001110; -+ int dShift = colToDiag ? 0b10010011 : 0b00111001; -+ -+ vshuf4i_w(bVec, bVec, bShift); -+ vshuf4i_w(cVec, cVec, cShift); -+ vshuf4i_w(dVec, dVec, dShift); -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp +new file mode 100644 +index 00000000000..e1c033e7085 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp @@ -0,0 +1,4238 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -46907,9 +47078,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + andr(tmp, ref, tmp); +} +#endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp +new file mode 100644 +index 00000000000..6727de3aa7a +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp @@ -0,0 +1,809 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -47720,9 +47893,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp 2024-02-20 10:42:36.158863448 +0800 +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp +new file mode 100644 +index 00000000000..43b388a2c4b +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch.inline.hpp @@ -0,0 +1,937 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -48661,13 +48836,107 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_MACROASSEMBLER_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp ---- a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,1625 @@ -+/* Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, Cavium. All rights reserved. (By BELLSOFT) -+ * Copyright (c) 2022, Loongson Technology. All rights reserved. +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp +new file mode 100644 +index 00000000000..ea4d5a2ac4c +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_chacha.cpp +@@ -0,0 +1,86 @@ ++/* ++ * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++ ++#include "asm/assembler.hpp" ++#include "asm/assembler.inline.hpp" ++#include "macroAssembler_loongarch.hpp" ++#include "memory/resourceArea.hpp" ++#include "runtime/stubRoutines.hpp" ++ ++/** ++ * Perform the quarter round calculations on values contained within ++ * four SIMD registers. ++ * ++ * @param aVec the SIMD register containing only the "a" values ++ * @param bVec the SIMD register containing only the "b" values ++ * @param cVec the SIMD register containing only the "c" values ++ * @param dVec the SIMD register containing only the "d" values ++ */ ++void MacroAssembler::cc20_quarter_round(FloatRegister aVec, FloatRegister bVec, ++ FloatRegister cVec, FloatRegister dVec) { ++ ++ // a += b, d ^= a, d <<<= 16 ++ vadd_w(aVec, aVec, bVec); ++ vxor_v(dVec, dVec, aVec); ++ vrotri_w(dVec, dVec, 16); ++ ++ // c += d, b ^= c, b <<<= 12 ++ vadd_w(cVec, cVec, dVec); ++ vxor_v(bVec, bVec, cVec); ++ vrotri_w(bVec, bVec, 20); ++ ++ // a += b, d ^= a, d <<<= 8 ++ vadd_w(aVec, aVec, bVec); ++ vxor_v(dVec, dVec, aVec); ++ vrotri_w(dVec, dVec, 24); ++ ++ // c += d, b ^= c, b <<<= 7 ++ vadd_w(cVec, cVec, dVec); ++ vxor_v(bVec, bVec, cVec); ++ vrotri_w(bVec, bVec, 25); ++} ++ ++/** ++ * Shift the b, c, and d vectors between columnar and diagonal representations. ++ * Note that the "a" vector does not shift. ++ * ++ * @param bVec the SIMD register containing only the "b" values ++ * @param cVec the SIMD register containing only the "c" values ++ * @param dVec the SIMD register containing only the "d" values ++ * @param colToDiag true if moving columnar to diagonal, false if ++ * moving diagonal back to columnar. ++ */ ++void MacroAssembler::cc20_shift_lane_org(FloatRegister bVec, FloatRegister cVec, ++ FloatRegister dVec, bool colToDiag) { ++ int bShift = colToDiag ? 0b00111001 : 0b10010011; ++ int cShift = 0b01001110; ++ int dShift = colToDiag ? 0b10010011 : 0b00111001; ++ ++ vshuf4i_w(bVec, bVec, bShift); ++ vshuf4i_w(cVec, cVec, cShift); ++ vshuf4i_w(dVec, dVec, dShift); ++} +diff --git a/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +new file mode 100644 +index 00000000000..b4a1b09b375 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/macroAssembler_loongarch_trig.cpp +@@ -0,0 +1,1625 @@ ++/* Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, Cavium. All rights reserved. (By BELLSOFT) ++ * Copyright (c) 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -50290,9 +50559,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + bind(DONE); + jr(RA); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/matcher_loongarch.hpp b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/matcher_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/matcher_loongarch.hpp b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp +new file mode 100644 +index 00000000000..79b5d4157a8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/matcher_loongarch.hpp @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. @@ -50475,9 +50746,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + +#endif // CPU_LOONGARCH_MATCHER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp +new file mode 100644 +index 00000000000..4b5d41aea07 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.cpp @@ -0,0 +1,568 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -51047,9 +51320,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) { +} +#endif //PRODUCT -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp +new file mode 100644 +index 00000000000..8e129225509 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/methodHandles_loongarch.hpp @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved. @@ -51116,9 +51391,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + // Should be in sharedRuntime, not here. + return R3; + } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp +new file mode 100644 +index 00000000000..c298cda5de7 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp @@ -0,0 +1,537 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -51657,9 +51934,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + *(uint32_t *)code_pos = instruction_code; + ICache::invalidate_range(code_pos, instruction_size); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp +new file mode 100644 +index 00000000000..3a322a218a3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp @@ -0,0 +1,595 @@ +/* + * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. @@ -52256,9 +52535,76 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_NATIVEINST_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/register_loongarch.cpp b/src/hotspot/cpu/loongarch/register_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/register_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/register_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +new file mode 100644 +index 00000000000..9b0ff3eae76 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++ ++// machine-dependent implementation for register maps ++ friend class frame; ++ ++ private: ++ // This is the hook for finding a register in an "well-known" location, ++ // such as a register block of a predetermined format. ++ // Since there is none, we just return null. ++ // See registerMap_sparc.hpp for an example of grabbing registers ++ // from register save areas of a standard layout. ++ address pd_location(VMReg reg) const {return nullptr;} ++ address pd_location(VMReg base_reg, int slot_idx) const { ++ if (base_reg->is_FloatRegister()) { ++ assert(base_reg->is_concrete(), "must pass base reg"); ++ intptr_t offset_in_bytes = slot_idx * VMRegImpl::stack_slot_size; ++ address base_location = location(base_reg, nullptr); ++ if (base_location != nullptr) { ++ return base_location + offset_in_bytes; ++ } else { ++ return nullptr; ++ } ++ } else { ++ return location(base_reg->next(slot_idx), nullptr); ++ } ++ } ++ ++ // no PD state to clear or copy: ++ void pd_clear() {} ++ void pd_initialize() {} ++ void pd_initialize_from(const RegisterMap* map) {} ++ ++#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.cpp b/src/hotspot/cpu/loongarch/register_loongarch.cpp +new file mode 100644 +index 00000000000..5378fce5cd2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.cpp @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -52321,9 +52667,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + }; + return is_valid() ? names[encoding()] : "fccnoreg"; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/register_loongarch.hpp b/src/hotspot/cpu/loongarch/register_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/register_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/register_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/register_loongarch.hpp b/src/hotspot/cpu/loongarch/register_loongarch.hpp +new file mode 100644 +index 00000000000..25f7abfe75e +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/register_loongarch.hpp @@ -0,0 +1,479 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -52804,12 +53152,14 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif //CPU_LOONGARCH_REGISTER_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/registerMap_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,59 @@ +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp +new file mode 100644 +index 00000000000..d7011d57525 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp +@@ -0,0 +1,133 @@ +/* -+ * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * @@ -52833,184 +53183,123 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * + */ + -+#ifndef CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -+#define CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP ++#include "precompiled.hpp" ++#include "asm/macroAssembler.hpp" ++#include "code/relocInfo.hpp" ++#include "compiler/disassembler.hpp" ++#include "nativeInst_loongarch.hpp" ++#include "oops/compressedOops.inline.hpp" ++#include "oops/oop.hpp" ++#include "oops/oop.inline.hpp" ++#include "runtime/safepoint.hpp" + -+// machine-dependent implementation for register maps -+ friend class frame; + -+ private: -+ // This is the hook for finding a register in an "well-known" location, -+ // such as a register block of a predetermined format. -+ // Since there is none, we just return null. -+ // See registerMap_sparc.hpp for an example of grabbing registers -+ // from register save areas of a standard layout. -+ address pd_location(VMReg reg) const {return nullptr;} -+ address pd_location(VMReg base_reg, int slot_idx) const { -+ if (base_reg->is_FloatRegister()) { -+ assert(base_reg->is_concrete(), "must pass base reg"); -+ intptr_t offset_in_bytes = slot_idx * VMRegImpl::stack_slot_size; -+ address base_location = location(base_reg, nullptr); -+ if (base_location != nullptr) { -+ return base_location + offset_in_bytes; ++void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { ++ x += o; ++ typedef Assembler::WhichOperand WhichOperand; ++ WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop ++ assert(which == Assembler::disp32_operand || ++ which == Assembler::narrow_oop_operand || ++ which == Assembler::imm_operand, "format unpacks ok"); ++ if (type() == relocInfo::internal_word_type || ++ type() == relocInfo::section_word_type || ++ type() == relocInfo::external_word_type) { ++ MacroAssembler::pd_patch_instruction(addr(), x); ++ } else if (which == Assembler::imm_operand) { ++ if (verify_only) { ++ assert(nativeMovConstReg_at(addr())->data() == (long)x, "instructions must match"); ++ } else { ++ nativeMovConstReg_at(addr())->set_data((intptr_t)(x)); ++ } ++ } else if (which == Assembler::narrow_oop_operand) { ++ // both compressed oops and compressed classes look the same ++ if (CompressedOops::is_in((void*)x)) { ++ if (verify_only) { ++ assert(nativeMovConstReg_at(addr())->data() == (long)CompressedOops::encode(cast_to_oop(x)), "instructions must match"); + } else { -+ return nullptr; ++ nativeMovConstReg_at(addr())->set_data((intptr_t)(CompressedOops::encode(cast_to_oop(x))), (intptr_t)(x)); + } + } else { -+ return location(base_reg->next(slot_idx), nullptr); ++ if (verify_only) { ++ assert(nativeMovConstReg_at(addr())->data() == (long)CompressedKlassPointers::encode((Klass*)x), "instructions must match"); ++ } else { ++ nativeMovConstReg_at(addr())->set_data((intptr_t)(CompressedKlassPointers::encode((Klass*)x)), (intptr_t)(x)); ++ } ++ } ++ } else { ++ // Note: Use runtime_call_type relocations for call32_operand. ++ assert(0, "call32_operand not supported in LoongArch64"); ++ } ++} ++ ++ ++address Relocation::pd_call_destination(address orig_addr) { ++ NativeInstruction* ni = nativeInstruction_at(addr()); ++ if (ni->is_far_call()) { ++ return nativeFarCall_at(addr())->destination(orig_addr); ++ } else if (ni->is_call()) { ++ address trampoline = nativeCall_at(addr())->get_trampoline(); ++ if (trampoline) { ++ return nativeCallTrampolineStub_at(trampoline)->destination(); ++ } else { ++ address new_addr = nativeCall_at(addr())->target_addr_for_bl(orig_addr); ++ // If call is branch to self, don't try to relocate it, just leave it ++ // as branch to self. This happens during code generation if the code ++ // buffer expands. It will be relocated to the trampoline above once ++ // code generation is complete. ++ return (new_addr == orig_addr) ? addr() : new_addr; + } ++ } else if (ni->is_jump()) { ++ return nativeGeneralJump_at(addr())->jump_destination(orig_addr); ++ } else { ++ tty->print_cr("\nError!\ncall destination: " INTPTR_FORMAT, p2i(addr())); ++ Disassembler::decode(addr() - 10 * BytesPerInstWord, addr() + 10 * BytesPerInstWord, tty); ++ ShouldNotReachHere(); ++ return nullptr; + } ++} + -+ // no PD state to clear or copy: -+ void pd_clear() {} -+ void pd_initialize() {} -+ void pd_initialize_from(const RegisterMap* map) {} ++void Relocation::pd_set_call_destination(address x) { ++ NativeInstruction* ni = nativeInstruction_at(addr()); ++ if (ni->is_far_call()) { ++ nativeFarCall_at(addr())->set_destination(x); ++ } else if (ni->is_call()) { ++ address trampoline = nativeCall_at(addr())->get_trampoline(); ++ if (trampoline) { ++ nativeCall_at(addr())->set_destination_mt_safe(x, false); ++ } else { ++ nativeCall_at(addr())->set_destination(x); ++ } ++ } else if (ni->is_jump()) { ++ nativeGeneralJump_at(addr())->set_jump_destination(x); ++ } else { ++ ShouldNotReachHere(); ++ } ++} + -+#endif // CPU_LOONGARCH_REGISTERMAP_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,133 @@ ++address* Relocation::pd_address_in_code() { ++ return (address*)addr(); ++} ++ ++address Relocation::pd_get_address_from_code() { ++ NativeMovConstReg* ni = nativeMovConstReg_at(addr()); ++ return (address)ni->data(); ++} ++ ++void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { ++} ++ ++void metadata_Relocation::pd_fix_value(address x) { ++} +diff --git a/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp +new file mode 100644 +index 00000000000..c85ca4963f3 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp +@@ -0,0 +1,44 @@ +/* -+ * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/macroAssembler.hpp" -+#include "code/relocInfo.hpp" -+#include "compiler/disassembler.hpp" -+#include "nativeInst_loongarch.hpp" -+#include "oops/compressedOops.inline.hpp" -+#include "oops/oop.hpp" -+#include "oops/oop.inline.hpp" -+#include "runtime/safepoint.hpp" -+ -+ -+void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { -+ x += o; -+ typedef Assembler::WhichOperand WhichOperand; -+ WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop -+ assert(which == Assembler::disp32_operand || -+ which == Assembler::narrow_oop_operand || -+ which == Assembler::imm_operand, "format unpacks ok"); -+ if (type() == relocInfo::internal_word_type || -+ type() == relocInfo::section_word_type || -+ type() == relocInfo::external_word_type) { -+ MacroAssembler::pd_patch_instruction(addr(), x); -+ } else if (which == Assembler::imm_operand) { -+ if (verify_only) { -+ assert(nativeMovConstReg_at(addr())->data() == (long)x, "instructions must match"); -+ } else { -+ nativeMovConstReg_at(addr())->set_data((intptr_t)(x)); -+ } -+ } else if (which == Assembler::narrow_oop_operand) { -+ // both compressed oops and compressed classes look the same -+ if (CompressedOops::is_in((void*)x)) { -+ if (verify_only) { -+ assert(nativeMovConstReg_at(addr())->data() == (long)CompressedOops::encode(cast_to_oop(x)), "instructions must match"); -+ } else { -+ nativeMovConstReg_at(addr())->set_data((intptr_t)(CompressedOops::encode(cast_to_oop(x))), (intptr_t)(x)); -+ } -+ } else { -+ if (verify_only) { -+ assert(nativeMovConstReg_at(addr())->data() == (long)CompressedKlassPointers::encode((Klass*)x), "instructions must match"); -+ } else { -+ nativeMovConstReg_at(addr())->set_data((intptr_t)(CompressedKlassPointers::encode((Klass*)x)), (intptr_t)(x)); -+ } -+ } -+ } else { -+ // Note: Use runtime_call_type relocations for call32_operand. -+ assert(0, "call32_operand not supported in LoongArch64"); -+ } -+} -+ -+ -+address Relocation::pd_call_destination(address orig_addr) { -+ NativeInstruction* ni = nativeInstruction_at(addr()); -+ if (ni->is_far_call()) { -+ return nativeFarCall_at(addr())->destination(orig_addr); -+ } else if (ni->is_call()) { -+ address trampoline = nativeCall_at(addr())->get_trampoline(); -+ if (trampoline) { -+ return nativeCallTrampolineStub_at(trampoline)->destination(); -+ } else { -+ address new_addr = nativeCall_at(addr())->target_addr_for_bl(orig_addr); -+ // If call is branch to self, don't try to relocate it, just leave it -+ // as branch to self. This happens during code generation if the code -+ // buffer expands. It will be relocated to the trampoline above once -+ // code generation is complete. -+ return (new_addr == orig_addr) ? addr() : new_addr; -+ } -+ } else if (ni->is_jump()) { -+ return nativeGeneralJump_at(addr())->jump_destination(orig_addr); -+ } else { -+ tty->print_cr("\nError!\ncall destination: " INTPTR_FORMAT, p2i(addr())); -+ Disassembler::decode(addr() - 10 * BytesPerInstWord, addr() + 10 * BytesPerInstWord, tty); -+ ShouldNotReachHere(); -+ return nullptr; -+ } -+} -+ -+void Relocation::pd_set_call_destination(address x) { -+ NativeInstruction* ni = nativeInstruction_at(addr()); -+ if (ni->is_far_call()) { -+ nativeFarCall_at(addr())->set_destination(x); -+ } else if (ni->is_call()) { -+ address trampoline = nativeCall_at(addr())->get_trampoline(); -+ if (trampoline) { -+ nativeCall_at(addr())->set_destination_mt_safe(x, false); -+ } else { -+ nativeCall_at(addr())->set_destination(x); -+ } -+ } else if (ni->is_jump()) { -+ nativeGeneralJump_at(addr())->set_jump_destination(x); -+ } else { -+ ShouldNotReachHere(); -+ } -+} -+ -+address* Relocation::pd_address_in_code() { -+ return (address*)addr(); -+} -+ -+address Relocation::pd_get_address_from_code() { -+ NativeMovConstReg* ni = nativeMovConstReg_at(addr()); -+ return (address)ni->data(); -+} -+ -+void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { -+} -+ -+void metadata_Relocation::pd_fix_value(address x) { -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/relocInfo_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,44 @@ -+/* -+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it @@ -53052,9 +53341,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + static bool mustIterateImmediateOopsInCode() { return false; } + +#endif // CPU_LOONGARCH_RELOCINFO_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp +new file mode 100644 +index 00000000000..930b1c18841 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp @@ -0,0 +1,2975 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -56031,9 +56322,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#endif // COMPILER2 + +extern "C" int SpinPause() {return 0;} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp +new file mode 100644 +index 00000000000..ebd11807b24 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. @@ -56127,9 +56420,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_SMALLREGISTERMAP_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp +new file mode 100644 +index 00000000000..d329c43d661 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stackChunkFrameStream_loongarch.inline.hpp @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. @@ -56273,9 +56568,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +inline void StackChunkFrameStream::update_reg_map_pd(RegisterMapT* map) {} + +#endif // CPU_LOONGARCH_STACKCHUNKFRAMESTREAM_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp +new file mode 100644 +index 00000000000..3e6b0e2a5cb +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stackChunkOop_loongarch.inline.hpp @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. @@ -56320,9 +56617,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // CPU_LOONGARCH_STACKCHUNKOOP_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp +new file mode 100644 +index 00000000000..87bfcb3f58f +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubGenerator_loongarch_64.cpp @@ -0,0 +1,5721 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -62045,209 +62344,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +void StubGenerator_generate(CodeBuffer* code, StubCodeGenerator::StubsKind kind) { + StubGenerator g(code, kind); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,196 @@ -+/* -+ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "runtime/deoptimization.hpp" -+#include "runtime/frame.inline.hpp" -+#include "runtime/javaThread.hpp" -+#include "runtime/stubRoutines.hpp" -+ -+// a description of how to extend it, see the stubRoutines.hpp file. -+ -+//find the last fp value -+address StubRoutines::la::_method_entry_barrier = nullptr; -+address StubRoutines::la::_vector_iota_indices = nullptr; -+address StubRoutines::la::_string_indexof_linear_ll = nullptr; -+address StubRoutines::la::_string_indexof_linear_uu = nullptr; -+address StubRoutines::la::_string_indexof_linear_ul = nullptr; -+address StubRoutines::la::_jlong_fill = nullptr; -+address StubRoutines::la::_arrayof_jlong_fill = nullptr; -+ -+/** -+ * crc_table[] from jdk/src/share/native/java/util/zip/zlib-1.2.5/crc32.h -+ */ -+juint StubRoutines::la::_crc_table[] = -+{ -+ 0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL, -+ 0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL, -+ 0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL, -+ 0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL, -+ 0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL, -+ 0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL, -+ 0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL, -+ 0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL, -+ 0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL, -+ 0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL, -+ 0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL, -+ 0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL, -+ 0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL, -+ 0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL, -+ 0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL, -+ 0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL, -+ 0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL, -+ 0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL, -+ 0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL, -+ 0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL, -+ 0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL, -+ 0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL, -+ 0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL, -+ 0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL, -+ 0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL, -+ 0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL, -+ 0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL, -+ 0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL, -+ 0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL, -+ 0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL, -+ 0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL, -+ 0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL, -+ 0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL, -+ 0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL, -+ 0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL, -+ 0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL, -+ 0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL, -+ 0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL, -+ 0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL, -+ 0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL, -+ 0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL, -+ 0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL, -+ 0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL, -+ 0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL, -+ 0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL, -+ 0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL, -+ 0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL, -+ 0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL, -+ 0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL, -+ 0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL, -+ 0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL, -+ 0x2d02ef8dUL -+}; -+ -+ATTRIBUTE_ALIGNED(64) juint StubRoutines::la::_npio2_hw[] = { -+ // first, various coefficient values: 0.5, invpio2, pio2_1, pio2_1t, pio2_2, -+ // pio2_2t, pio2_3, pio2_3t -+ // This is a small optimization which keeping double[8] values in int[] table -+ // to have less address calculation instructions -+ // -+ // invpio2: 53 bits of 2/pi (enough for cases when trigonometric argument is small) -+ // pio2_1: first 33 bit of pi/2 -+ // pio2_1t: pi/2 - pio2_1 -+ // pio2_2: second 33 bit of pi/2 -+ // pio2_2t: pi/2 - (pio2_1+pio2_2) -+ // pio2_3: third 33 bit of pi/2 -+ // pio2_3t: pi/2 - (pio2_1+pio2_2+pio2_3) -+ 0x00000000, 0x3fe00000, // 0.5 -+ 0x6DC9C883, 0x3FE45F30, // invpio2 = 6.36619772367581382433e-01 -+ 0x54400000, 0x3FF921FB, // pio2_1 = 1.57079632673412561417e+00 -+ 0x1A626331, 0x3DD0B461, // pio2_1t = 6.07710050650619224932e-11 -+ 0x1A600000, 0x3DD0B461, // pio2_2 = 6.07710050630396597660e-11 -+ 0x2E037073, 0x3BA3198A, // pio2_2t = 2.02226624879595063154e-21 -+ 0x2E000000, 0x3BA3198A, // pio2_3 = 2.02226624871116645580e-21 -+ 0x252049C1, 0x397B839A, // pio2_3t = 8.47842766036889956997e-32 -+ // now, npio2_hw itself -+ 0x3FF921FB, 0x400921FB, 0x4012D97C, 0x401921FB, 0x401F6A7A, 0x4022D97C, -+ 0x4025FDBB, 0x402921FB, 0x402C463A, 0x402F6A7A, 0x4031475C, 0x4032D97C, -+ 0x40346B9C, 0x4035FDBB, 0x40378FDB, 0x403921FB, 0x403AB41B, 0x403C463A, -+ 0x403DD85A, 0x403F6A7A, 0x40407E4C, 0x4041475C, 0x4042106C, 0x4042D97C, -+ 0x4043A28C, 0x40446B9C, 0x404534AC, 0x4045FDBB, 0x4046C6CB, 0x40478FDB, -+ 0x404858EB, 0x404921FB -+}; -+ -+// Coefficients for sin(x) polynomial approximation: S1..S6. -+// See kernel_sin comments in macroAssembler_loongarch64_trig.cpp for details -+ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_dsin_coef[] = { -+ -1.66666666666666324348e-01, // 0xBFC5555555555549 -+ 8.33333333332248946124e-03, // 0x3F8111111110F8A6 -+ -1.98412698298579493134e-04, // 0xBF2A01A019C161D5 -+ 2.75573137070700676789e-06, // 0x3EC71DE357B1FE7D -+ -2.50507602534068634195e-08, // 0xBE5AE5E68A2B9CEB -+ 1.58969099521155010221e-10 // 0x3DE5D93A5ACFD57C -+}; -+ -+// Coefficients for cos(x) polynomial approximation: C1..C6. -+// See kernel_cos comments in macroAssembler_loongarch64_trig.cpp for details -+ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_dcos_coef[] = { -+ 4.16666666666666019037e-02, // c0x3FA555555555554C -+ -1.38888888888741095749e-03, // 0xBF56C16C16C15177 -+ 2.48015872894767294178e-05, // 0x3EFA01A019CB1590 -+ -2.75573143513906633035e-07, // 0xBE927E4F809C52AD -+ 2.08757232129817482790e-09, // 0x3E21EE9EBDB4B1C4 -+ -1.13596475577881948265e-11 // 0xBDA8FAE9BE8838D4 -+}; -+ -+ATTRIBUTE_ALIGNED(128) julong StubRoutines::la::_string_compress_index[] = { -+ 0x0e0c0a0806040200UL, 0x1e1c1a1816141210UL // 128-bit shuffle index -+}; -+ -+// Table of constants for 2/pi, 396 Hex digits (476 decimal) of 2/pi. -+// Used in cases of very large argument. 396 hex digits is enough to support -+// required precision. -+// Converted to double to avoid unnecessary conversion in code -+// NOTE: table looks like original int table: {0xA2F983, 0x6E4E44,...} with -+// only (double) conversion added -+ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_two_over_pi[] = { -+ (double)0xA2F983, (double)0x6E4E44, (double)0x1529FC, (double)0x2757D1, (double)0xF534DD, (double)0xC0DB62, -+ (double)0x95993C, (double)0x439041, (double)0xFE5163, (double)0xABDEBB, (double)0xC561B7, (double)0x246E3A, -+ (double)0x424DD2, (double)0xE00649, (double)0x2EEA09, (double)0xD1921C, (double)0xFE1DEB, (double)0x1CB129, -+ (double)0xA73EE8, (double)0x8235F5, (double)0x2EBB44, (double)0x84E99C, (double)0x7026B4, (double)0x5F7E41, -+ (double)0x3991D6, (double)0x398353, (double)0x39F49C, (double)0x845F8B, (double)0xBDF928, (double)0x3B1FF8, -+ (double)0x97FFDE, (double)0x05980F, (double)0xEF2F11, (double)0x8B5A0A, (double)0x6D1F6D, (double)0x367ECF, -+ (double)0x27CB09, (double)0xB74F46, (double)0x3F669E, (double)0x5FEA2D, (double)0x7527BA, (double)0xC7EBE5, -+ (double)0xF17B3D, (double)0x0739F7, (double)0x8A5292, (double)0xEA6BFB, (double)0x5FB11F, (double)0x8D5D08, -+ (double)0x560330, (double)0x46FC7B, (double)0x6BABF0, (double)0xCFBC20, (double)0x9AF436, (double)0x1DA9E3, -+ (double)0x91615E, (double)0xE61B08, (double)0x659985, (double)0x5F14A0, (double)0x68408D, (double)0xFFD880, -+ (double)0x4D7327, (double)0x310606, (double)0x1556CA, (double)0x73A8C9, (double)0x60E27B, (double)0xC08C6B, -+}; -+ -+// Pi over 2 value -+ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_pio2[] = { -+ 1.57079625129699707031e+00, // 0x3FF921FB40000000 -+ 7.54978941586159635335e-08, // 0x3E74442D00000000 -+ 5.39030252995776476554e-15, // 0x3CF8469880000000 -+ 3.28200341580791294123e-22, // 0x3B78CC5160000000 -+ 1.27065575308067607349e-29, // 0x39F01B8380000000 -+ 1.22933308981111328932e-36, // 0x387A252040000000 -+ 2.73370053816464559624e-44, // 0x36E3822280000000 -+ 2.16741683877804819444e-51, // 0x3569F31D00000000 -+}; -+ -+ATTRIBUTE_ALIGNED(64) jfloat StubRoutines::la::_round_float_imm[] = { -+ -0.5f, 0.49999997f // magic number for ties -+}; -+ -+ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_round_double_imm[] = { -+ -0.5d, 0.49999999999999994d // magic number for ties -+}; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp +new file mode 100644 +index 00000000000..2614bbd6832 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch.hpp @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -62367,9 +62468,213 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_STUBROUTINES_LOONGARCH_64_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp +new file mode 100644 +index 00000000000..4d8fe415483 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/stubRoutines_loongarch_64.cpp +@@ -0,0 +1,196 @@ ++/* ++ * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "runtime/deoptimization.hpp" ++#include "runtime/frame.inline.hpp" ++#include "runtime/javaThread.hpp" ++#include "runtime/stubRoutines.hpp" ++ ++// a description of how to extend it, see the stubRoutines.hpp file. ++ ++//find the last fp value ++address StubRoutines::la::_method_entry_barrier = nullptr; ++address StubRoutines::la::_vector_iota_indices = nullptr; ++address StubRoutines::la::_string_indexof_linear_ll = nullptr; ++address StubRoutines::la::_string_indexof_linear_uu = nullptr; ++address StubRoutines::la::_string_indexof_linear_ul = nullptr; ++address StubRoutines::la::_jlong_fill = nullptr; ++address StubRoutines::la::_arrayof_jlong_fill = nullptr; ++ ++/** ++ * crc_table[] from jdk/src/share/native/java/util/zip/zlib-1.2.5/crc32.h ++ */ ++juint StubRoutines::la::_crc_table[] = ++{ ++ 0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL, ++ 0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL, ++ 0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL, ++ 0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL, ++ 0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL, ++ 0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL, ++ 0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL, ++ 0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL, ++ 0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL, ++ 0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL, ++ 0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL, ++ 0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL, ++ 0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL, ++ 0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL, ++ 0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL, ++ 0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL, ++ 0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL, ++ 0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL, ++ 0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL, ++ 0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL, ++ 0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL, ++ 0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL, ++ 0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL, ++ 0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL, ++ 0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL, ++ 0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL, ++ 0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL, ++ 0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL, ++ 0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL, ++ 0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL, ++ 0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL, ++ 0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL, ++ 0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL, ++ 0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL, ++ 0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL, ++ 0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL, ++ 0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL, ++ 0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL, ++ 0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL, ++ 0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL, ++ 0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL, ++ 0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL, ++ 0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL, ++ 0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL, ++ 0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL, ++ 0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL, ++ 0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL, ++ 0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL, ++ 0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL, ++ 0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL, ++ 0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL, ++ 0x2d02ef8dUL ++}; ++ ++ATTRIBUTE_ALIGNED(64) juint StubRoutines::la::_npio2_hw[] = { ++ // first, various coefficient values: 0.5, invpio2, pio2_1, pio2_1t, pio2_2, ++ // pio2_2t, pio2_3, pio2_3t ++ // This is a small optimization which keeping double[8] values in int[] table ++ // to have less address calculation instructions ++ // ++ // invpio2: 53 bits of 2/pi (enough for cases when trigonometric argument is small) ++ // pio2_1: first 33 bit of pi/2 ++ // pio2_1t: pi/2 - pio2_1 ++ // pio2_2: second 33 bit of pi/2 ++ // pio2_2t: pi/2 - (pio2_1+pio2_2) ++ // pio2_3: third 33 bit of pi/2 ++ // pio2_3t: pi/2 - (pio2_1+pio2_2+pio2_3) ++ 0x00000000, 0x3fe00000, // 0.5 ++ 0x6DC9C883, 0x3FE45F30, // invpio2 = 6.36619772367581382433e-01 ++ 0x54400000, 0x3FF921FB, // pio2_1 = 1.57079632673412561417e+00 ++ 0x1A626331, 0x3DD0B461, // pio2_1t = 6.07710050650619224932e-11 ++ 0x1A600000, 0x3DD0B461, // pio2_2 = 6.07710050630396597660e-11 ++ 0x2E037073, 0x3BA3198A, // pio2_2t = 2.02226624879595063154e-21 ++ 0x2E000000, 0x3BA3198A, // pio2_3 = 2.02226624871116645580e-21 ++ 0x252049C1, 0x397B839A, // pio2_3t = 8.47842766036889956997e-32 ++ // now, npio2_hw itself ++ 0x3FF921FB, 0x400921FB, 0x4012D97C, 0x401921FB, 0x401F6A7A, 0x4022D97C, ++ 0x4025FDBB, 0x402921FB, 0x402C463A, 0x402F6A7A, 0x4031475C, 0x4032D97C, ++ 0x40346B9C, 0x4035FDBB, 0x40378FDB, 0x403921FB, 0x403AB41B, 0x403C463A, ++ 0x403DD85A, 0x403F6A7A, 0x40407E4C, 0x4041475C, 0x4042106C, 0x4042D97C, ++ 0x4043A28C, 0x40446B9C, 0x404534AC, 0x4045FDBB, 0x4046C6CB, 0x40478FDB, ++ 0x404858EB, 0x404921FB ++}; ++ ++// Coefficients for sin(x) polynomial approximation: S1..S6. ++// See kernel_sin comments in macroAssembler_loongarch64_trig.cpp for details ++ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_dsin_coef[] = { ++ -1.66666666666666324348e-01, // 0xBFC5555555555549 ++ 8.33333333332248946124e-03, // 0x3F8111111110F8A6 ++ -1.98412698298579493134e-04, // 0xBF2A01A019C161D5 ++ 2.75573137070700676789e-06, // 0x3EC71DE357B1FE7D ++ -2.50507602534068634195e-08, // 0xBE5AE5E68A2B9CEB ++ 1.58969099521155010221e-10 // 0x3DE5D93A5ACFD57C ++}; ++ ++// Coefficients for cos(x) polynomial approximation: C1..C6. ++// See kernel_cos comments in macroAssembler_loongarch64_trig.cpp for details ++ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_dcos_coef[] = { ++ 4.16666666666666019037e-02, // c0x3FA555555555554C ++ -1.38888888888741095749e-03, // 0xBF56C16C16C15177 ++ 2.48015872894767294178e-05, // 0x3EFA01A019CB1590 ++ -2.75573143513906633035e-07, // 0xBE927E4F809C52AD ++ 2.08757232129817482790e-09, // 0x3E21EE9EBDB4B1C4 ++ -1.13596475577881948265e-11 // 0xBDA8FAE9BE8838D4 ++}; ++ ++ATTRIBUTE_ALIGNED(128) julong StubRoutines::la::_string_compress_index[] = { ++ 0x0e0c0a0806040200UL, 0x1e1c1a1816141210UL // 128-bit shuffle index ++}; ++ ++// Table of constants for 2/pi, 396 Hex digits (476 decimal) of 2/pi. ++// Used in cases of very large argument. 396 hex digits is enough to support ++// required precision. ++// Converted to double to avoid unnecessary conversion in code ++// NOTE: table looks like original int table: {0xA2F983, 0x6E4E44,...} with ++// only (double) conversion added ++ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_two_over_pi[] = { ++ (double)0xA2F983, (double)0x6E4E44, (double)0x1529FC, (double)0x2757D1, (double)0xF534DD, (double)0xC0DB62, ++ (double)0x95993C, (double)0x439041, (double)0xFE5163, (double)0xABDEBB, (double)0xC561B7, (double)0x246E3A, ++ (double)0x424DD2, (double)0xE00649, (double)0x2EEA09, (double)0xD1921C, (double)0xFE1DEB, (double)0x1CB129, ++ (double)0xA73EE8, (double)0x8235F5, (double)0x2EBB44, (double)0x84E99C, (double)0x7026B4, (double)0x5F7E41, ++ (double)0x3991D6, (double)0x398353, (double)0x39F49C, (double)0x845F8B, (double)0xBDF928, (double)0x3B1FF8, ++ (double)0x97FFDE, (double)0x05980F, (double)0xEF2F11, (double)0x8B5A0A, (double)0x6D1F6D, (double)0x367ECF, ++ (double)0x27CB09, (double)0xB74F46, (double)0x3F669E, (double)0x5FEA2D, (double)0x7527BA, (double)0xC7EBE5, ++ (double)0xF17B3D, (double)0x0739F7, (double)0x8A5292, (double)0xEA6BFB, (double)0x5FB11F, (double)0x8D5D08, ++ (double)0x560330, (double)0x46FC7B, (double)0x6BABF0, (double)0xCFBC20, (double)0x9AF436, (double)0x1DA9E3, ++ (double)0x91615E, (double)0xE61B08, (double)0x659985, (double)0x5F14A0, (double)0x68408D, (double)0xFFD880, ++ (double)0x4D7327, (double)0x310606, (double)0x1556CA, (double)0x73A8C9, (double)0x60E27B, (double)0xC08C6B, ++}; ++ ++// Pi over 2 value ++ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_pio2[] = { ++ 1.57079625129699707031e+00, // 0x3FF921FB40000000 ++ 7.54978941586159635335e-08, // 0x3E74442D00000000 ++ 5.39030252995776476554e-15, // 0x3CF8469880000000 ++ 3.28200341580791294123e-22, // 0x3B78CC5160000000 ++ 1.27065575308067607349e-29, // 0x39F01B8380000000 ++ 1.22933308981111328932e-36, // 0x387A252040000000 ++ 2.73370053816464559624e-44, // 0x36E3822280000000 ++ 2.16741683877804819444e-51, // 0x3569F31D00000000 ++}; ++ ++ATTRIBUTE_ALIGNED(64) jfloat StubRoutines::la::_round_float_imm[] = { ++ -0.5f, 0.49999997f // magic number for ties ++}; ++ ++ATTRIBUTE_ALIGNED(64) jdouble StubRoutines::la::_round_double_imm[] = { ++ -0.5d, 0.49999999999999994d // magic number for ties ++}; +diff --git a/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp +new file mode 100644 +index 00000000000..f625f9b43b9 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateInterpreterGenerator_loongarch.cpp @@ -0,0 +1,2106 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -64477,9 +64782,60 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ bind(L); +} +#endif // !PRODUCT -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +new file mode 100644 +index 00000000000..ddb38faf446 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp +@@ -0,0 +1,43 @@ ++/* ++ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP ++ ++ static void prepare_invoke(int byte_no, ++ Register method, // linked method (or i-klass) ++ Register index = noreg, // itable index, MethodType, etc. ++ Register recv = noreg, // if caller wants to see it ++ Register flags = noreg // if caller wants to test it ++ ); ++ static void invokevirtual_helper(Register index, Register recv, ++ Register flags); ++ static void volatile_barrier(); ++ ++ // Helpers ++ static void index_check(Register array, Register index); ++ static void index_check_without_pop(Register array, Register index); ++ ++#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP +diff --git a/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp +new file mode 100644 +index 00000000000..7d308d998dd +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/templateTable_loongarch_64.cpp @@ -0,0 +1,4007 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -68488,56 +68844,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + __ alsl_d(SP, AT, SP, Address::times_8 - 1); + __ membar(__ AnyAny);//no membar here for aarch64 +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/templateTable_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,43 @@ -+/* -+ * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -+#define CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -+ -+ static void prepare_invoke(int byte_no, -+ Register method, // linked method (or i-klass) -+ Register index = noreg, // itable index, MethodType, etc. -+ Register recv = noreg, // if caller wants to see it -+ Register flags = noreg // if caller wants to test it -+ ); -+ static void invokevirtual_helper(Register index, Register recv, -+ Register flags); -+ static void volatile_barrier(); -+ -+ // Helpers -+ static void index_check(Register array, Register index); -+ static void index_check_without_pop(Register array, Register index); -+ -+#endif // CPU_LOONGARCH_TEMPLATETABLE_LOONGARCH_64_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp b/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp b/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp +new file mode 100644 +index 00000000000..ccaa16bb6b1 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/upcallLinker_loongarch_64.cpp @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2020, Red Hat, Inc. All rights reserved. @@ -68886,262 +69197,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + + return blob->code_begin(); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,54 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#include "precompiled.hpp" -+#include "asm/assembler.hpp" -+#include "code/vmreg.hpp" -+#include "vmreg_loongarch.inline.hpp" -+ -+ -+ -+void VMRegImpl::set_regName() { -+ Register reg = ::as_Register(0); -+ int i; -+ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { -+ for (int j = 0 ; j < Register::max_slots_per_register ; j++) { -+ regName[i++] = reg->name(); -+ } -+ reg = reg->successor(); -+ } -+ -+ FloatRegister freg = ::as_FloatRegister(0); -+ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { -+ for (int j = 0 ; j < FloatRegister::max_slots_per_register ; j++) { -+ regName[i++] = freg->name(); -+ } -+ freg = freg->successor(); -+ } -+ -+ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { -+ regName[i] = "NON-GPR-FPR"; -+ } -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP -+ -+inline bool is_Register() { -+ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; -+} -+ -+inline Register as_Register() { -+ assert( is_Register(), "must be"); -+ return ::as_Register(value() / Register::max_slots_per_register); -+} -+ -+inline bool is_FloatRegister() { -+ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; -+} -+ -+inline FloatRegister as_FloatRegister() { -+ assert( is_FloatRegister() && is_even(value()), "must be" ); -+ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / -+ FloatRegister::max_slots_per_register); -+} -+ -+inline bool is_concrete() { -+ assert(is_reg(), "must be"); -+ if (is_FloatRegister()) { -+ int base = value() - ConcreteRegisterImpl::max_gpr; -+ return base % FloatRegister::max_slots_per_register == 0; -+ } else { -+ return is_even(value()); -+ } -+} -+ -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp ---- a/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,38 @@ -+/* -+ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -+ -+inline VMReg Register::RegisterImpl::as_VMReg() const { -+ return VMRegImpl::as_VMReg(encoding() * Register::max_slots_per_register); -+} -+ -+inline VMReg FloatRegister::FloatRegisterImpl::as_VMReg() const { -+ return VMRegImpl::as_VMReg((encoding() * FloatRegister::max_slots_per_register) + -+ ConcreteRegisterImpl::max_gpr); -+} -+ -+#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp b/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 -@@ -0,0 +1,87 @@ -+/* -+ * Copyright (c) 2023, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+#ifndef CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP -+#define CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP -+ -+#include -+ -+#include "asm/register.hpp" -+ -+// keep in sync with jdk/internal/foreign/abi/aarch64/AArch64Architecture -+enum class StorageType : int8_t { -+ INTEGER = 0, -+ FLOAT = 1, -+ STACK = 2, -+ PLACEHOLDER = 3, -+// special locations used only by native code -+ FRAME_DATA = PLACEHOLDER + 1, -+ INVALID = -1 -+}; -+ -+// need to define this before constructing VMStorage (below) -+constexpr inline bool VMStorage::is_reg(StorageType type) { -+ return type == StorageType::INTEGER || type == StorageType::FLOAT; -+} -+constexpr inline StorageType VMStorage::stack_type() { return StorageType::STACK; } -+constexpr inline StorageType VMStorage::placeholder_type() { return StorageType::PLACEHOLDER; } -+constexpr inline StorageType VMStorage::frame_data_type() { return StorageType::FRAME_DATA; } -+ -+constexpr uint16_t REG64_MASK = 0b0000000000000001; -+constexpr uint16_t FLOAT64_MASK = 0b0000000000000001; -+ -+inline Register as_Register(VMStorage vms) { -+ assert(vms.type() == StorageType::INTEGER, "not the right type"); -+ return ::as_Register(vms.index()); -+} -+ -+inline FloatRegister as_FloatRegister(VMStorage vms) { -+ assert(vms.type() == StorageType::FLOAT, "not the right type"); -+ return ::as_FloatRegister(vms.index()); -+} -+ -+constexpr inline VMStorage as_VMStorage(Register reg) { -+ return VMStorage::reg_storage(StorageType::INTEGER, REG64_MASK, reg->encoding()); -+} -+ -+constexpr inline VMStorage as_VMStorage(FloatRegister reg) { -+ return VMStorage::reg_storage(StorageType::FLOAT, FLOAT64_MASK, reg->encoding()); -+} -+ -+inline VMStorage as_VMStorage(VMReg reg, BasicType bt) { -+ if (reg->is_Register()) { -+ return as_VMStorage(reg->as_Register()); -+ } else if (reg->is_FloatRegister()) { -+ return as_VMStorage(reg->as_FloatRegister()); -+ } else if (reg->is_stack()) { -+ return VMStorage::stack_storage(reg); -+ } else if (!reg->is_valid()) { -+ return VMStorage::invalid(); -+ } -+ -+ ShouldNotReachHere(); -+ return VMStorage::invalid(); -+} -+ -+#endif // CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp +new file mode 100644 +index 00000000000..5b9f7b78981 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmStructs_loongarch.hpp @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved. @@ -69204,9 +69264,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + /* be present there) */ + +#endif // CPU_LOONGARCH_VMSTRUCTS_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp ---- a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp +new file mode 100644 +index 00000000000..44bca90d2c2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.cpp @@ -0,0 +1,511 @@ +/* + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. @@ -69719,9 +69781,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + } + return true; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp ---- a/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp +new file mode 100644 +index 00000000000..04bd6942dc2 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vm_version_loongarch.hpp @@ -0,0 +1,308 @@ +/* + * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. @@ -70031,9 +70095,272 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // CPU_LOONGARCH_VM_VERSION_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp ---- a/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp 2024-02-20 10:42:36.162196780 +0800 +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +new file mode 100644 +index 00000000000..3433ca028fe +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.cpp +@@ -0,0 +1,54 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#include "precompiled.hpp" ++#include "asm/assembler.hpp" ++#include "code/vmreg.hpp" ++#include "vmreg_loongarch.inline.hpp" ++ ++ ++ ++void VMRegImpl::set_regName() { ++ Register reg = ::as_Register(0); ++ int i; ++ for (i = 0; i < ConcreteRegisterImpl::max_gpr ; ) { ++ for (int j = 0 ; j < Register::max_slots_per_register ; j++) { ++ regName[i++] = reg->name(); ++ } ++ reg = reg->successor(); ++ } ++ ++ FloatRegister freg = ::as_FloatRegister(0); ++ for ( ; i < ConcreteRegisterImpl::max_fpr ; ) { ++ for (int j = 0 ; j < FloatRegister::max_slots_per_register ; j++) { ++ regName[i++] = freg->name(); ++ } ++ freg = freg->successor(); ++ } ++ ++ for ( ; i < ConcreteRegisterImpl::number_of_registers ; i ++ ) { ++ regName[i] = "NON-GPR-FPR"; ++ } ++} +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +new file mode 100644 +index 00000000000..ff79e91f60d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.hpp +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_HPP ++ ++inline bool is_Register() { ++ return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; ++} ++ ++inline Register as_Register() { ++ assert( is_Register(), "must be"); ++ return ::as_Register(value() / Register::max_slots_per_register); ++} ++ ++inline bool is_FloatRegister() { ++ return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; ++} ++ ++inline FloatRegister as_FloatRegister() { ++ assert( is_FloatRegister() && is_even(value()), "must be" ); ++ return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) / ++ FloatRegister::max_slots_per_register); ++} ++ ++inline bool is_concrete() { ++ assert(is_reg(), "must be"); ++ if (is_FloatRegister()) { ++ int base = value() - ConcreteRegisterImpl::max_gpr; ++ return base % FloatRegister::max_slots_per_register == 0; ++ } else { ++ return is_even(value()); ++ } ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_HPP +diff --git a/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +new file mode 100644 +index 00000000000..3f158bd9bae +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmreg_loongarch.inline.hpp +@@ -0,0 +1,38 @@ ++/* ++ * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++#ifndef CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++#define CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP ++ ++inline VMReg Register::RegisterImpl::as_VMReg() const { ++ return VMRegImpl::as_VMReg(encoding() * Register::max_slots_per_register); ++} ++ ++inline VMReg FloatRegister::FloatRegisterImpl::as_VMReg() const { ++ return VMRegImpl::as_VMReg((encoding() * FloatRegister::max_slots_per_register) + ++ ConcreteRegisterImpl::max_gpr); ++} ++ ++#endif // CPU_LOONGARCH_VMREG_LOONGARCH_INLINE_HPP +diff --git a/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp b/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp +new file mode 100644 +index 00000000000..03b53dc81f8 +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vmstorage_loongarch.hpp +@@ -0,0 +1,87 @@ ++/* ++ * Copyright (c) 2023, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++#ifndef CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP ++#define CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP ++ ++#include ++ ++#include "asm/register.hpp" ++ ++// keep in sync with jdk/internal/foreign/abi/aarch64/AArch64Architecture ++enum class StorageType : int8_t { ++ INTEGER = 0, ++ FLOAT = 1, ++ STACK = 2, ++ PLACEHOLDER = 3, ++// special locations used only by native code ++ FRAME_DATA = PLACEHOLDER + 1, ++ INVALID = -1 ++}; ++ ++// need to define this before constructing VMStorage (below) ++constexpr inline bool VMStorage::is_reg(StorageType type) { ++ return type == StorageType::INTEGER || type == StorageType::FLOAT; ++} ++constexpr inline StorageType VMStorage::stack_type() { return StorageType::STACK; } ++constexpr inline StorageType VMStorage::placeholder_type() { return StorageType::PLACEHOLDER; } ++constexpr inline StorageType VMStorage::frame_data_type() { return StorageType::FRAME_DATA; } ++ ++constexpr uint16_t REG64_MASK = 0b0000000000000001; ++constexpr uint16_t FLOAT64_MASK = 0b0000000000000001; ++ ++inline Register as_Register(VMStorage vms) { ++ assert(vms.type() == StorageType::INTEGER, "not the right type"); ++ return ::as_Register(vms.index()); ++} ++ ++inline FloatRegister as_FloatRegister(VMStorage vms) { ++ assert(vms.type() == StorageType::FLOAT, "not the right type"); ++ return ::as_FloatRegister(vms.index()); ++} ++ ++constexpr inline VMStorage as_VMStorage(Register reg) { ++ return VMStorage::reg_storage(StorageType::INTEGER, REG64_MASK, reg->encoding()); ++} ++ ++constexpr inline VMStorage as_VMStorage(FloatRegister reg) { ++ return VMStorage::reg_storage(StorageType::FLOAT, FLOAT64_MASK, reg->encoding()); ++} ++ ++inline VMStorage as_VMStorage(VMReg reg, BasicType bt) { ++ if (reg->is_Register()) { ++ return as_VMStorage(reg->as_Register()); ++ } else if (reg->is_FloatRegister()) { ++ return as_VMStorage(reg->as_FloatRegister()); ++ } else if (reg->is_stack()) { ++ return VMStorage::stack_storage(reg); ++ } else if (!reg->is_valid()) { ++ return VMStorage::invalid(); ++ } ++ ++ ShouldNotReachHere(); ++ return VMStorage::invalid(); ++} ++ ++#endif // CPU_LOONGARCH_VMSTORAGE_LOONGARCH_INLINE_HPP +diff --git a/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp +new file mode 100644 +index 00000000000..ab12021832d +--- /dev/null ++++ b/src/hotspot/cpu/loongarch/vtableStubs_loongarch_64.cpp @@ -0,0 +1,312 @@ +/* + * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved. @@ -70347,9 +70674,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + const unsigned int icache_line_size = wordSize; + return icache_line_size; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp ---- a/src/hotspot/os/linux/os_linux.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/os/linux/os_linux.cpp 2024-02-20 10:42:36.235530055 +0800 +diff --git a/src/hotspot/os/linux/os_linux.cpp b/src/hotspot/os/linux/os_linux.cpp +index aa8be1d897d..f71a20207c5 100644 +--- a/src/hotspot/os/linux/os_linux.cpp ++++ b/src/hotspot/os/linux/os_linux.cpp @@ -23,6 +23,12 @@ * */ @@ -70363,7 +70691,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // no precompiled headers #include "classfile/vmSymbols.hpp" #include "code/icBuffer.hpp" -@@ -2186,6 +2192,12 @@ +@@ -2191,6 +2197,12 @@ bool os::Linux::query_process_memory_info(os::Linux::meminfo_t* info) { return false; } @@ -70376,7 +70704,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifdef __GLIBC__ // For Glibc, print a one-liner with the malloc tunables. // Most important and popular is MALLOC_ARENA_MAX, but we are -@@ -2402,7 +2414,7 @@ +@@ -2407,7 +2419,7 @@ void os::print_memory_info(outputStream* st) { // before "flags" so if we find a second "model name", then the // "flags" field is considered missing. static bool print_model_name_and_flags(outputStream* st, char* buf, size_t buflen) { @@ -70385,7 +70713,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Other platforms have less repetitive cpuinfo files FILE *fp = os::fopen("/proc/cpuinfo", "r"); if (fp) { -@@ -2514,7 +2526,7 @@ +@@ -2519,7 +2531,7 @@ void os::jfr_report_memory_info() { #endif // INCLUDE_JFR @@ -70394,7 +70722,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h const char* search_string = "model name"; #elif defined(M68K) const char* search_string = "CPU"; -@@ -4483,6 +4495,44 @@ +@@ -4490,6 +4502,44 @@ void os::Linux::numa_init() { // If there's only one node (they start from 0) or if the process // is bound explicitly to a single node using membind, disable NUMA UseNUMA = false; @@ -70439,9 +70767,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h } else { LogTarget(Info,os) log; LogStream ls(log); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os/linux/os_linux.hpp b/src/hotspot/os/linux/os_linux.hpp ---- a/src/hotspot/os/linux/os_linux.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/os/linux/os_linux.hpp 2024-02-20 10:42:36.235530055 +0800 +diff --git a/src/hotspot/os/linux/os_linux.hpp b/src/hotspot/os/linux/os_linux.hpp +index ace7e4ab2dd..4baf381b2f2 100644 +--- a/src/hotspot/os/linux/os_linux.hpp ++++ b/src/hotspot/os/linux/os_linux.hpp @@ -22,6 +22,12 @@ * */ @@ -70455,7 +70784,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef OS_LINUX_OS_LINUX_HPP #define OS_LINUX_OS_LINUX_HPP -@@ -193,6 +199,8 @@ +@@ -193,6 +199,8 @@ class os::Linux { // none present @@ -70464,9 +70793,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h private: static void numa_init(); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp b/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp ---- a/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp 2024-02-20 10:42:36.235530055 +0800 +diff --git a/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp b/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp +index 609967128fb..d67deeda164 100644 +--- a/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp ++++ b/src/hotspot/os/linux/systemMemoryBarrier_linux.cpp @@ -22,6 +22,12 @@ * */ @@ -70489,9 +70819,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #else #error define SYS_membarrier for the arch #endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h b/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h ---- a/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h b/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h +new file mode 100644 +index 00000000000..305974a178f +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/amcas_asm.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -70660,9 +70992,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + ".endm \n\t" + ); +#endif /* __AMCAS_ASM_H__ */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp ---- a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp +new file mode 100644 +index 00000000000..30719a0340b +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/assembler_linux_loongarch.cpp @@ -0,0 +1,24 @@ +/* + * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. @@ -70688,9 +71022,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + * questions. + * + */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp +new file mode 100644 +index 00000000000..bb820b5e5ae +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/atomic_linux_loongarch.hpp @@ -0,0 +1,361 @@ +/* + * Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71053,9 +71389,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +}; + +#endif // OS_CPU_LINUX_LOONGARCH_ATOMIC_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp +new file mode 100644 +index 00000000000..37587b6bf72 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/copy_linux_loongarch.inline.hpp @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -71202,9 +71540,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // OS_CPU_LINUX_LOONGARCH_COPY_LINUX_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp +new file mode 100644 +index 00000000000..3ebb1327cd7 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/gc/x/xSyscall_linux_loongarch.hpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -71247,9 +71587,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#endif + +#endif // OS_CPU_LINUX_LOONGARCH_GC_X_XSYSCALL_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp +new file mode 100644 +index 00000000000..46d5d5a268b +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/gc/z/zSyscall_linux_loongarch.hpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2019, 2021, Oracle and/or its affiliates. All rights reserved. @@ -71292,9 +71634,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#endif + +#endif // OS_CPU_LINUX_LOONGARCH_GC_Z_ZSYSCALL_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp +new file mode 100644 +index 00000000000..0b5247aa0b6 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/globals_linux_loongarch.hpp @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71339,9 +71683,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +define_pd_global(uintx,HeapBaseMinAddress, 2*G); + +#endif // OS_CPU_LINUX_LOONGARCH_GLOBALS_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp ---- a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp +new file mode 100644 +index 00000000000..76a662afe87 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.cpp @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71448,9 +71794,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +void JavaThread::cache_global_variables() { } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp +new file mode 100644 +index 00000000000..ea14dd335a5 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/javaThread_linux_loongarch.hpp @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71518,9 +71866,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + static void disable_register_stack_guard() {} + +#endif // OS_CPU_LINUX_LOONGARCH_JAVATHREAD_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s ---- a/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s +new file mode 100644 +index 00000000000..ebd73af0c53 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/linux_loongarch.s @@ -0,0 +1,25 @@ +# +# Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71547,9 +71897,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +# + + -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp +new file mode 100644 +index 00000000000..2d096943ae8 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/orderAccess_linux_loongarch.hpp @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. @@ -71601,9 +71953,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#undef inlasm_sync + +#endif // OS_CPU_LINUX_LOONGARCH_ORDERACCESS_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp ---- a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp +new file mode 100644 +index 00000000000..31bfcba8db6 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp @@ -0,0 +1,491 @@ +/* + * Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved. @@ -72096,9 +72450,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + // LA does not require the additional stack bang. + return 0; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp +new file mode 100644 +index 00000000000..43071194ac1 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.inline.hpp @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved. @@ -72129,9 +72485,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#define OS_CPU_LINUX_LOONGARCH_OS_LINUX_LOONGARCH_INLINE_HPP + +#endif // OS_CPU_LINUX_LOONGARCH_OS_LINUX_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp +new file mode 100644 +index 00000000000..5fe74ccd97c +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/prefetch_linux_loongarch.inline.hpp @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. @@ -72189,9 +72547,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +} + +#endif // OS_CPU_LINUX_LOONGARCH_PREFETCH_LINUX_LOONGARCH_INLINE_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S ---- a/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S +new file mode 100644 +index 00000000000..fdc6da358e5 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/safefetch_linux_loongarch64.S @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2022 SAP SE. All rights reserved. @@ -72249,9 +72609,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +_SafeFetchN_continuation: + or $r4, $r5, $r0 + jr $r1 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp ---- a/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp +new file mode 100644 +index 00000000000..a39cb79bb1e +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vmStructs_linux_loongarch.hpp @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. @@ -72308,9 +72670,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h +#define VM_LONG_CONSTANTS_OS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant) + +#endif // OS_CPU_LINUX_LOONGARCH_VMSTRUCTS_LINUX_LOONGARCH_HPP -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp ---- a/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp 2024-02-20 10:42:36.245530048 +0800 +diff --git a/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp +new file mode 100644 +index 00000000000..3711a7036a1 +--- /dev/null ++++ b/src/hotspot/os_cpu/linux_loongarch/vm_version_linux_loongarch.cpp @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2006, 2021, Oracle and/or its affiliates. All rights reserved. @@ -72407,9 +72771,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h + HWCAP_LOONGARCH_LBT_ARM | + HWCAP_LOONGARCH_LBT_MIPS); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/adlc/formssel.cpp b/src/hotspot/share/adlc/formssel.cpp ---- a/src/hotspot/share/adlc/formssel.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/adlc/formssel.cpp 2024-02-20 10:42:36.252196709 +0800 +diff --git a/src/hotspot/share/adlc/formssel.cpp b/src/hotspot/share/adlc/formssel.cpp +index be4ee3a3acf..9eb3b3a9dc7 100644 +--- a/src/hotspot/share/adlc/formssel.cpp ++++ b/src/hotspot/share/adlc/formssel.cpp @@ -22,6 +22,12 @@ * */ @@ -72423,7 +72788,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // FORMS.CPP - Definitions for ADL Parser Forms Classes #include "adlc.hpp" -@@ -4144,6 +4150,7 @@ +@@ -4144,6 +4150,7 @@ bool MatchRule::is_ideal_membar() const { !strcmp(_opType,"MemBarVolatile") || !strcmp(_opType,"MemBarCPUOrder") || !strcmp(_opType,"MemBarStoreStore") || @@ -72431,9 +72796,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h !strcmp(_opType,"OnSpinWait"); } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/c1/c1_Compiler.cpp b/src/hotspot/share/c1/c1_Compiler.cpp ---- a/src/hotspot/share/c1/c1_Compiler.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/c1/c1_Compiler.cpp 2024-02-20 10:42:36.255530038 +0800 +diff --git a/src/hotspot/share/c1/c1_Compiler.cpp b/src/hotspot/share/c1/c1_Compiler.cpp +index 22299b4051b..573ce8ff7b0 100644 +--- a/src/hotspot/share/c1/c1_Compiler.cpp ++++ b/src/hotspot/share/c1/c1_Compiler.cpp @@ -43,6 +43,12 @@ #include "utilities/bitMap.inline.hpp" #include "utilities/macros.hpp" @@ -72447,7 +72813,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h Compiler::Compiler() : AbstractCompiler(compiler_c1) { } -@@ -219,7 +225,7 @@ +@@ -219,7 +225,7 @@ bool Compiler::is_intrinsic_supported(const methodHandle& method) { case vmIntrinsics::_updateCRC32: case vmIntrinsics::_updateBytesCRC32: case vmIntrinsics::_updateByteBufferCRC32: @@ -72456,95 +72822,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h case vmIntrinsics::_updateBytesCRC32C: case vmIntrinsics::_updateDirectByteBufferCRC32C: #endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/c1/c1_LinearScan.cpp b/src/hotspot/share/c1/c1_LinearScan.cpp ---- a/src/hotspot/share/c1/c1_LinearScan.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/c1/c1_LinearScan.cpp 2024-02-20 10:42:36.258863370 +0800 -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #include "precompiled.hpp" - #include "c1/c1_CFGPrinter.hpp" - #include "c1/c1_CodeStubs.hpp" -@@ -35,6 +41,12 @@ - #include "runtime/timerTrace.hpp" - #include "utilities/bitMap.inline.hpp" - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - #ifndef PRODUCT - - static LinearScanStatistic _stat_before_alloc; -@@ -3141,9 +3153,6 @@ - } - } - --#ifndef RISCV -- // Disable these optimizations on riscv temporarily, because it does not -- // work when the comparison operands are bound to branches or cmoves. - { TIME_LINEAR_SCAN(timer_optimize_lir); - - EdgeMoveOptimizer::optimize(ir()->code()); -@@ -3151,7 +3160,6 @@ - // check that cfg is still correct after optimizations - ir()->verify(); - } --#endif - - NOT_PRODUCT(print_lir(1, "Before Code Generation", false)); - NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_final)); -@@ -5957,9 +5965,13 @@ - if (block->number_of_preds() > 1 && !block->is_set(BlockBegin::exception_entry_flag)) { - optimizer.optimize_moves_at_block_end(block); - } -+#if !defined(RISCV) && !defined(LOONGARCH) -+ // Disable this optimization on riscv and loongarch temporarily, because it does not -+ // work when the comparison operands are bound to branches or cmoves. - if (block->number_of_sux() == 2) { - optimizer.optimize_moves_at_block_begin(block); - } -+#endif - } - } - -@@ -6376,7 +6388,16 @@ - LIR_OpBranch* prev_branch = (LIR_OpBranch*)prev_op; - - if (prev_branch->stub() == nullptr) { -+#if defined(RISCV) || defined(LOONGARCH) -+ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == nullptr) { -+ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); - -+ // eliminate a conditional branch to the immediate successor -+ prev_branch->change_block(last_branch->block()); -+ prev_branch->negate_cond(); -+ instructions->trunc_to(instructions->length() - 1); -+ } -+#else - LIR_Op2* prev_cmp = nullptr; - // There might be a cmove inserted for profiling which depends on the same - // compare. If we change the condition of the respective compare, we have -@@ -6416,6 +6437,7 @@ - prev_cmove->set_in_opr2(t); - } - } -+#endif - } - } - } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/c1/c1_LIR.cpp b/src/hotspot/share/c1/c1_LIR.cpp ---- a/src/hotspot/share/c1/c1_LIR.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/c1/c1_LIR.cpp 2024-02-20 10:42:36.258863370 +0800 +diff --git a/src/hotspot/share/c1/c1_LIR.cpp b/src/hotspot/share/c1/c1_LIR.cpp +index dee208c11be..c147ee8f66a 100644 +--- a/src/hotspot/share/c1/c1_LIR.cpp ++++ b/src/hotspot/share/c1/c1_LIR.cpp @@ -22,6 +22,12 @@ * */ @@ -72558,7 +72839,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "c1/c1_CodeStubs.hpp" #include "c1/c1_InstructionPrinter.hpp" -@@ -491,6 +497,7 @@ +@@ -491,6 +497,7 @@ void LIR_OpVisitState::visit(LIR_Op* op) { assert(opConvert->_info == nullptr, "must be"); if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); if (opConvert->_result->is_valid()) do_output(opConvert->_result); @@ -72566,7 +72847,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h do_stub(opConvert->_stub); break; -@@ -1101,7 +1108,7 @@ +@@ -1101,7 +1108,7 @@ LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) , _file(nullptr) , _line(0) #endif @@ -72575,7 +72856,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h , _cmp_opr1(LIR_OprFact::illegalOpr) , _cmp_opr2(LIR_OprFact::illegalOpr) #endif -@@ -1122,7 +1129,7 @@ +@@ -1122,7 +1129,7 @@ void LIR_List::set_file_and_line(const char * file, int line) { } #endif @@ -72584,7 +72865,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h void LIR_List::set_cmp_oprs(LIR_Op* op) { switch (op->code()) { case lir_cmp: -@@ -1151,7 +1158,7 @@ +@@ -1151,7 +1158,7 @@ void LIR_List::set_cmp_oprs(LIR_Op* op) { break; #if INCLUDE_ZGC case lir_xloadbarrier_test: @@ -72593,7 +72874,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h _cmp_opr2 = LIR_OprFact::intConst(0); break; #endif -@@ -1406,11 +1413,12 @@ +@@ -1406,11 +1413,12 @@ void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, L tmp)); } @@ -72608,7 +72889,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h } void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { -@@ -1927,6 +1935,9 @@ +@@ -1927,6 +1935,9 @@ void LIR_OpConvert::print_instr(outputStream* out) const { print_bytecode(out, bytecode()); in_opr()->print(out); out->print(" "); result_opr()->print(out); out->print(" "); @@ -72618,9 +72899,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h } void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/c1/c1_LIR.hpp b/src/hotspot/share/c1/c1_LIR.hpp ---- a/src/hotspot/share/c1/c1_LIR.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/c1/c1_LIR.hpp 2024-02-20 10:42:36.258863370 +0800 +diff --git a/src/hotspot/share/c1/c1_LIR.hpp b/src/hotspot/share/c1/c1_LIR.hpp +index 6f527135fbe..2e2910bdb5c 100644 +--- a/src/hotspot/share/c1/c1_LIR.hpp ++++ b/src/hotspot/share/c1/c1_LIR.hpp @@ -22,6 +22,12 @@ * */ @@ -72634,7 +72916,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_C1_C1_LIR_HPP #define SHARE_C1_C1_LIR_HPP -@@ -1453,15 +1459,18 @@ +@@ -1453,15 +1459,18 @@ class LIR_OpConvert: public LIR_Op1 { private: Bytecodes::Code _bytecode; ConversionStub* _stub; @@ -72655,7 +72937,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h virtual void emit_code(LIR_Assembler* masm); virtual LIR_OpConvert* as_OpConvert() { return this; } -@@ -2097,7 +2106,7 @@ +@@ -2097,7 +2106,7 @@ class LIR_List: public CompilationResourceObj { const char * _file; int _line; #endif @@ -72664,7 +72946,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h LIR_Opr _cmp_opr1; LIR_Opr _cmp_opr2; #endif -@@ -2113,7 +2122,7 @@ +@@ -2113,7 +2122,7 @@ class LIR_List: public CompilationResourceObj { } #endif // PRODUCT @@ -72673,7 +72955,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h set_cmp_oprs(op); // lir_cmp set cmp oprs only on riscv if (op->code() == lir_cmp) return; -@@ -2135,7 +2144,7 @@ +@@ -2135,7 +2144,7 @@ class LIR_List: public CompilationResourceObj { void set_file_and_line(const char * file, int line); #endif @@ -72682,7 +72964,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h void set_cmp_oprs(LIR_Op* op); #endif -@@ -2228,7 +2237,9 @@ +@@ -2228,7 +2237,9 @@ class LIR_List: public CompilationResourceObj { void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } void return_op(LIR_Opr result) { append(new LIR_OpReturn(result)); } @@ -72693,7 +72975,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } -@@ -2336,7 +2347,7 @@ +@@ -2336,7 +2347,7 @@ class LIR_List: public CompilationResourceObj { void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } @@ -72702,9 +72984,97 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { append(new LIR_OpRTCall(routine, tmp, result, arguments)); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/code/vtableStubs.cpp b/src/hotspot/share/code/vtableStubs.cpp ---- a/src/hotspot/share/code/vtableStubs.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/code/vtableStubs.cpp 2024-02-20 10:42:36.292196678 +0800 +diff --git a/src/hotspot/share/c1/c1_LinearScan.cpp b/src/hotspot/share/c1/c1_LinearScan.cpp +index 0634d970c26..f7797935846 100644 +--- a/src/hotspot/share/c1/c1_LinearScan.cpp ++++ b/src/hotspot/share/c1/c1_LinearScan.cpp +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #include "precompiled.hpp" + #include "c1/c1_CFGPrinter.hpp" + #include "c1/c1_CodeStubs.hpp" +@@ -35,6 +41,12 @@ + #include "runtime/timerTrace.hpp" + #include "utilities/bitMap.inline.hpp" + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + #ifndef PRODUCT + + static LinearScanStatistic _stat_before_alloc; +@@ -3141,9 +3153,6 @@ void LinearScan::do_linear_scan() { + } + } + +-#ifndef RISCV +- // Disable these optimizations on riscv temporarily, because it does not +- // work when the comparison operands are bound to branches or cmoves. + { TIME_LINEAR_SCAN(timer_optimize_lir); + + EdgeMoveOptimizer::optimize(ir()->code()); +@@ -3151,7 +3160,6 @@ void LinearScan::do_linear_scan() { + // check that cfg is still correct after optimizations + ir()->verify(); + } +-#endif + + NOT_PRODUCT(print_lir(1, "Before Code Generation", false)); + NOT_PRODUCT(LinearScanStatistic::compute(this, _stat_final)); +@@ -5957,9 +5965,13 @@ void EdgeMoveOptimizer::optimize(BlockList* code) { + if (block->number_of_preds() > 1 && !block->is_set(BlockBegin::exception_entry_flag)) { + optimizer.optimize_moves_at_block_end(block); + } ++#if !defined(RISCV) && !defined(LOONGARCH) ++ // Disable this optimization on riscv and loongarch temporarily, because it does not ++ // work when the comparison operands are bound to branches or cmoves. + if (block->number_of_sux() == 2) { + optimizer.optimize_moves_at_block_begin(block); + } ++#endif + } + } + +@@ -6376,7 +6388,16 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { + LIR_OpBranch* prev_branch = (LIR_OpBranch*)prev_op; + + if (prev_branch->stub() == nullptr) { ++#if defined(RISCV) || defined(LOONGARCH) ++ if (prev_branch->block() == code->at(i + 1) && prev_branch->info() == nullptr) { ++ TRACE_LINEAR_SCAN(3, tty->print_cr("Negating conditional branch and deleting unconditional branch at end of block B%d", block->block_id())); + ++ // eliminate a conditional branch to the immediate successor ++ prev_branch->change_block(last_branch->block()); ++ prev_branch->negate_cond(); ++ instructions->trunc_to(instructions->length() - 1); ++ } ++#else + LIR_Op2* prev_cmp = nullptr; + // There might be a cmove inserted for profiling which depends on the same + // compare. If we change the condition of the respective compare, we have +@@ -6416,6 +6437,7 @@ void ControlFlowOptimizer::delete_unnecessary_jumps(BlockList* code) { + prev_cmove->set_in_opr2(t); + } + } ++#endif + } + } + } +diff --git a/src/hotspot/share/code/vtableStubs.cpp b/src/hotspot/share/code/vtableStubs.cpp +index 934f805eefc..774a81f569b 100644 +--- a/src/hotspot/share/code/vtableStubs.cpp ++++ b/src/hotspot/share/code/vtableStubs.cpp @@ -22,6 +22,12 @@ * */ @@ -72718,7 +73088,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "code/vtableStubs.hpp" #include "compiler/compileBroker.hpp" -@@ -102,7 +108,11 @@ +@@ -102,7 +108,11 @@ int VtableStubs::_itab_stub_size = 0; #if defined(PRODUCT) // These values are good for the PRODUCT case (no tracing). @@ -72730,9 +73100,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h static const int first_itableStub_size = 256; #else // These values are good for the non-PRODUCT case (when tracing can be switched on). -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/g1/g1Arguments.cpp b/src/hotspot/share/gc/g1/g1Arguments.cpp ---- a/src/hotspot/share/gc/g1/g1Arguments.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/g1/g1Arguments.cpp 2024-02-20 10:42:36.298863339 +0800 +diff --git a/src/hotspot/share/gc/g1/g1Arguments.cpp b/src/hotspot/share/gc/g1/g1Arguments.cpp +index 28f850938c4..626bfee16a9 100644 +--- a/src/hotspot/share/gc/g1/g1Arguments.cpp ++++ b/src/hotspot/share/gc/g1/g1Arguments.cpp @@ -23,6 +23,12 @@ * */ @@ -72746,7 +73117,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "gc/g1/g1Arguments.hpp" #include "gc/g1/g1CardSet.hpp" -@@ -164,6 +170,20 @@ +@@ -164,6 +170,20 @@ void G1Arguments::initialize_card_set_configuration() { void G1Arguments::initialize() { GCArguments::initialize(); assert(UseG1GC, "Error"); @@ -72767,9 +73138,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h FLAG_SET_DEFAULT(ParallelGCThreads, WorkerPolicy::parallel_worker_threads()); if (ParallelGCThreads == 0) { assert(!FLAG_IS_DEFAULT(ParallelGCThreads), "The default value for ParallelGCThreads should not be 0."); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp ---- a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp 2024-02-20 10:42:36.312196661 +0800 +diff --git a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp +index 41553e6bf19..d426a240c7e 100644 +--- a/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp ++++ b/src/hotspot/share/gc/g1/g1ParScanThreadState.inline.hpp @@ -22,6 +22,12 @@ * */ @@ -72783,7 +73155,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_GC_G1_G1PARSCANTHREADSTATE_INLINE_HPP #define SHARE_GC_G1_G1PARSCANTHREADSTATE_INLINE_HPP -@@ -59,6 +65,9 @@ +@@ -59,6 +65,9 @@ void G1ParScanThreadState::trim_queue_partially() { void G1ParScanThreadState::trim_queue() { trim_queue_to_threshold(0); assert(_task_queue->overflow_empty(), "invariant"); @@ -72793,9 +73165,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h assert(_task_queue->taskqueue_empty(), "invariant"); } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/parallel/parallelArguments.cpp b/src/hotspot/share/gc/parallel/parallelArguments.cpp ---- a/src/hotspot/share/gc/parallel/parallelArguments.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/parallel/parallelArguments.cpp 2024-02-20 10:42:36.322196654 +0800 +diff --git a/src/hotspot/share/gc/parallel/parallelArguments.cpp b/src/hotspot/share/gc/parallel/parallelArguments.cpp +index 468dc7bdfaf..c331cbf2be6 100644 +--- a/src/hotspot/share/gc/parallel/parallelArguments.cpp ++++ b/src/hotspot/share/gc/parallel/parallelArguments.cpp @@ -23,6 +23,12 @@ * */ @@ -72809,7 +73182,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "gc/parallel/parallelArguments.hpp" #include "gc/parallel/parallelScavengeHeap.hpp" -@@ -45,6 +51,12 @@ +@@ -45,6 +51,12 @@ void ParallelArguments::initialize() { GCArguments::initialize(); assert(UseParallelGC, "Error"); @@ -72822,9 +73195,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // If no heap maximum was requested explicitly, use some reasonable fraction // of the physical memory, up to a maximum of 1GB. FLAG_SET_DEFAULT(ParallelGCThreads, -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/shared/barrierSetNMethod.cpp b/src/hotspot/share/gc/shared/barrierSetNMethod.cpp ---- a/src/hotspot/share/gc/shared/barrierSetNMethod.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/shared/barrierSetNMethod.cpp 2024-02-20 10:42:36.328863315 +0800 +diff --git a/src/hotspot/share/gc/shared/barrierSetNMethod.cpp b/src/hotspot/share/gc/shared/barrierSetNMethod.cpp +index adf0527681b..a1a76917f39 100644 +--- a/src/hotspot/share/gc/shared/barrierSetNMethod.cpp ++++ b/src/hotspot/share/gc/shared/barrierSetNMethod.cpp @@ -22,6 +22,12 @@ * */ @@ -72838,7 +73212,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "code/codeCache.hpp" #include "code/nmethod.hpp" -@@ -158,7 +164,7 @@ +@@ -158,7 +164,7 @@ void BarrierSetNMethod::arm_all_nmethods() { BarrierSetNMethodArmClosure cl(_current_phase); Threads::threads_do(&cl); @@ -72847,9 +73221,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // We clear the patching epoch when disarming nmethods, so that // the counter won't overflow. BarrierSetAssembler::clear_patching_epoch(); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp ---- a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp 2024-02-20 10:42:36.332196645 +0800 +diff --git a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp +index 41bd15ab000..508e37fa2c4 100644 +--- a/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp ++++ b/src/hotspot/share/gc/shared/c2/barrierSetC2.cpp @@ -22,6 +22,12 @@ * */ @@ -72863,7 +73238,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "gc/shared/tlab_globals.hpp" #include "gc/shared/c2/barrierSetC2.hpp" -@@ -263,6 +269,8 @@ +@@ -263,6 +269,8 @@ public: bool is_volatile = (decorators & MO_SEQ_CST) != 0; bool is_acquire = (decorators & MO_ACQUIRE) != 0; @@ -72872,7 +73247,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // If reference is volatile, prevent following volatiles ops from // floating up before the volatile access. -@@ -296,6 +304,13 @@ +@@ -296,6 +304,13 @@ public: assert(_leading_membar == nullptr || support_IRIW_for_not_multiple_copy_atomic_cpu, "no leading membar expected"); Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n); mb->as_MemBar()->set_trailing_load(); @@ -72886,9 +73261,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h } } } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp ---- a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp 2024-02-20 10:42:36.345529969 +0800 +diff --git a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp +index 7d31ff02e1a..07dac06aecf 100644 +--- a/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp ++++ b/src/hotspot/share/gc/shenandoah/shenandoahArguments.cpp @@ -22,6 +22,12 @@ * */ @@ -72911,9 +73287,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h vm_exit_during_initialization("Shenandoah GC is not supported on this platform."); #endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ---- a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp 2024-02-20 10:42:36.365529953 +0800 +diff --git a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp +index aefec771871..95c0b16d8c6 100644 +--- a/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp ++++ b/src/hotspot/share/gc/z/c1/zBarrierSetC1.cpp @@ -21,6 +21,12 @@ * questions. */ @@ -72927,7 +73304,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "c1/c1_FrameMap.hpp" #include "c1/c1_LIR.hpp" -@@ -453,6 +459,10 @@ +@@ -453,6 +459,10 @@ LIR_Opr ZBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cm #endif access.gen()->lir()->move(cmp_value.result(), cmp_value_opr); @@ -72938,7 +73315,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h __ cas_obj(access.resolved_addr()->as_address_ptr()->base(), cmp_value_opr, new_value_zpointer, -@@ -460,12 +470,19 @@ +@@ -460,12 +470,19 @@ LIR_Opr ZBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cm access.gen()->new_register(T_OBJECT), access.gen()->new_register(T_OBJECT), access.gen()->new_register(T_OBJECT)); @@ -72958,9 +73335,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h return result; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp b/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp ---- a/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp 2024-02-20 10:42:36.372196614 +0800 +diff --git a/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp b/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp +index f917a6c3e7b..a851a673f98 100644 +--- a/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp ++++ b/src/hotspot/share/gc/z/zStoreBarrierBuffer.hpp @@ -21,6 +21,12 @@ * questions. */ @@ -72974,7 +73352,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_GC_Z_ZSTOREBARRIERBUFFER_HPP #define SHARE_GC_Z_ZSTOREBARRIERBUFFER_HPP -@@ -42,7 +48,9 @@ +@@ -42,7 +48,9 @@ class ZStoreBarrierBuffer : public CHeapObj { friend class ZVerify; private: @@ -72985,9 +73363,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h static const size_t _buffer_size_bytes = _buffer_length * sizeof(ZStoreBarrierEntry); ZStoreBarrierEntry _buffer[_buffer_length]; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp ---- a/src/hotspot/share/interpreter/interpreterRuntime.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp 2024-02-20 10:42:36.375529945 +0800 +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.cpp b/src/hotspot/share/interpreter/interpreterRuntime.cpp +index ddb6ca32108..0365b9023a0 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.cpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.cpp @@ -22,6 +22,12 @@ * */ @@ -73001,7 +73380,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/javaClasses.inline.hpp" #include "classfile/symbolTable.hpp" -@@ -1471,7 +1477,7 @@ +@@ -1471,7 +1477,7 @@ JRT_ENTRY(void, InterpreterRuntime::prepare_native_call(JavaThread* current, Met // preparing the same method will be sure to see non-null entry & mirror. JRT_END @@ -73010,9 +73389,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h JRT_LEAF(void, InterpreterRuntime::popframe_move_outgoing_args(JavaThread* current, void* src_address, void* dest_address)) assert(current == JavaThread::current(), "pre-condition"); if (src_address == dest_address) { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/interpreter/interpreterRuntime.hpp b/src/hotspot/share/interpreter/interpreterRuntime.hpp ---- a/src/hotspot/share/interpreter/interpreterRuntime.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/interpreter/interpreterRuntime.hpp 2024-02-20 10:42:36.375529945 +0800 +diff --git a/src/hotspot/share/interpreter/interpreterRuntime.hpp b/src/hotspot/share/interpreter/interpreterRuntime.hpp +index 97cfcb1eae6..622e49f2f77 100644 +--- a/src/hotspot/share/interpreter/interpreterRuntime.hpp ++++ b/src/hotspot/share/interpreter/interpreterRuntime.hpp @@ -22,6 +22,12 @@ * */ @@ -73026,7 +73406,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_INTERPRETER_INTERPRETERRUNTIME_HPP #define SHARE_INTERPRETER_INTERPRETERRUNTIME_HPP -@@ -133,7 +139,7 @@ +@@ -133,7 +139,7 @@ class InterpreterRuntime: AllStatic { Method* method, intptr_t* from, intptr_t* to); @@ -73035,9 +73415,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Popframe support (only needed on x86, AMD64 and ARM) static void popframe_move_outgoing_args(JavaThread* current, void* src_address, void* dest_address); #endif -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ---- a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp 2024-02-20 10:42:36.378863275 +0800 +diff --git a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp +index bcccff2fe82..5c836ab5114 100644 +--- a/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp ++++ b/src/hotspot/share/interpreter/templateInterpreterGenerator.hpp @@ -22,6 +22,12 @@ * */ @@ -73051,7 +73432,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP #define SHARE_INTERPRETER_TEMPLATEINTERPRETERGENERATOR_HPP -@@ -115,9 +121,9 @@ +@@ -115,9 +121,9 @@ class TemplateInterpreterGenerator: public AbstractInterpreterGenerator { void generate_fixed_frame(bool native_call); @@ -73063,9 +73444,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifdef ARM32 void generate_math_runtime_call(AbstractInterpreter::MethodKind kind); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ---- a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp 2024-02-20 10:42:36.392196597 +0800 +diff --git a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp +index b3a3600deb6..59fd9d3416f 100644 +--- a/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp ++++ b/src/hotspot/share/jfr/utilities/jfrBigEndian.hpp @@ -22,6 +22,12 @@ * */ @@ -73079,7 +73461,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_JFR_UTILITIES_JFRBIGENDIAN_HPP #define SHARE_JFR_UTILITIES_JFRBIGENDIAN_HPP -@@ -103,7 +109,7 @@ +@@ -103,7 +109,7 @@ inline T JfrBigEndian::read_unaligned(const address location) { inline bool JfrBigEndian::platform_supports_unaligned_reads(void) { #if defined(IA32) || defined(AMD64) || defined(PPC) || defined(S390) return true; @@ -73088,9 +73470,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h return false; #else #warning "Unconfigured platform" -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ---- a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp 2024-02-20 10:42:36.398863261 +0800 +diff --git a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp +index a4195a04f18..9394ed12b81 100644 +--- a/src/hotspot/share/jvmci/vmStructs_jvmci.cpp ++++ b/src/hotspot/share/jvmci/vmStructs_jvmci.cpp @@ -22,6 +22,12 @@ * */ @@ -73122,9 +73505,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifdef X86 #define VM_STRUCTS_CPU(nonstatic_field, static_field, unchecked_nonstatic_field, volatile_nonstatic_field, nonproduct_nonstatic_field, c2_nonstatic_field, unchecked_c1_static_field, unchecked_c2_static_field) \ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/memory/metaspace.cpp b/src/hotspot/share/memory/metaspace.cpp ---- a/src/hotspot/share/memory/metaspace.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/memory/metaspace.cpp 2024-02-20 10:42:36.402196590 +0800 +diff --git a/src/hotspot/share/memory/metaspace.cpp b/src/hotspot/share/memory/metaspace.cpp +index f3008084254..5780d3f3ad6 100644 +--- a/src/hotspot/share/memory/metaspace.cpp ++++ b/src/hotspot/share/memory/metaspace.cpp @@ -23,6 +23,12 @@ * */ @@ -73138,7 +73522,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "cds/metaspaceShared.hpp" #include "classfile/classLoaderData.hpp" -@@ -582,12 +588,13 @@ +@@ -582,12 +588,13 @@ bool Metaspace::class_space_is_initialized() { // On error, returns an unreserved space. ReservedSpace Metaspace::reserve_address_space_for_compressed_classes(size_t size) { @@ -73153,7 +73537,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Additionally, above 32G, ensure the lower LogKlassAlignmentInBytes bits // of the upper 32-bits of the address are zero so we can handle a shift // when decoding. -@@ -644,16 +651,16 @@ +@@ -644,16 +651,16 @@ ReservedSpace Metaspace::reserve_address_space_for_compressed_classes(size_t siz return rs; } } @@ -73173,9 +73557,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h } #endif // _LP64 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/oops/stackChunkOop.inline.hpp b/src/hotspot/share/oops/stackChunkOop.inline.hpp ---- a/src/hotspot/share/oops/stackChunkOop.inline.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/oops/stackChunkOop.inline.hpp 2024-02-20 10:42:36.415529912 +0800 +diff --git a/src/hotspot/share/oops/stackChunkOop.inline.hpp b/src/hotspot/share/oops/stackChunkOop.inline.hpp +index 1d5bb7ffa81..37a41655672 100644 +--- a/src/hotspot/share/oops/stackChunkOop.inline.hpp ++++ b/src/hotspot/share/oops/stackChunkOop.inline.hpp @@ -22,6 +22,12 @@ * */ @@ -73189,7 +73574,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_OOPS_STACKCHUNKOOP_INLINE_HPP #define SHARE_OOPS_STACKCHUNKOOP_INLINE_HPP -@@ -335,7 +341,7 @@ +@@ -335,7 +341,7 @@ inline void stackChunkOopDesc::copy_from_stack_to_chunk(intptr_t* from, intptr_t assert(to >= start_address(), "Chunk underflow"); assert(to + size <= end_address(), "Chunk overflow"); @@ -73198,7 +73583,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Suppress compilation warning-as-error on unimplemented architectures // that stub out arch-specific methods. Some compilers are smart enough // to figure out the argument is always null and then warn about it. -@@ -354,7 +360,7 @@ +@@ -354,7 +360,7 @@ inline void stackChunkOopDesc::copy_from_chunk_to_stack(intptr_t* from, intptr_t assert(from >= start_address(), ""); assert(from + size <= end_address(), ""); @@ -73207,9 +73592,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Suppress compilation warning-as-error on unimplemented architectures // that stub out arch-specific methods. Some compilers are smart enough // to figure out the argument is always null and then warn about it. -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/opto/classes.hpp b/src/hotspot/share/opto/classes.hpp ---- a/src/hotspot/share/opto/classes.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/opto/classes.hpp 2024-02-20 10:42:36.422196574 +0800 +diff --git a/src/hotspot/share/opto/classes.hpp b/src/hotspot/share/opto/classes.hpp +index 892ccc6b8ab..6c1b9affcbe 100644 +--- a/src/hotspot/share/opto/classes.hpp ++++ b/src/hotspot/share/opto/classes.hpp @@ -22,6 +22,12 @@ * */ @@ -73223,7 +73609,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "utilities/macros.hpp" // The giant table of Node classes. -@@ -233,6 +239,7 @@ +@@ -233,6 +239,7 @@ macro(StoreStoreFence) macro(MemBarReleaseLock) macro(MemBarVolatile) macro(MemBarStoreStore) @@ -73231,9 +73617,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h macro(MergeMem) macro(MinI) macro(MinL) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp ---- a/src/hotspot/share/opto/compile.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/opto/compile.cpp 2024-02-20 10:42:36.422196574 +0800 +diff --git a/src/hotspot/share/opto/compile.cpp b/src/hotspot/share/opto/compile.cpp +index c9b82face2d..40005a687f5 100644 +--- a/src/hotspot/share/opto/compile.cpp ++++ b/src/hotspot/share/opto/compile.cpp @@ -22,6 +22,12 @@ * */ @@ -73247,7 +73634,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "asm/macroAssembler.hpp" #include "asm/macroAssembler.inline.hpp" -@@ -3746,6 +3752,7 @@ +@@ -3755,6 +3761,7 @@ void Compile::final_graph_reshaping_main_switch(Node* n, Final_Reshape_Counts& f n->set_req(MemBarNode::Precedent, top()); } break; @@ -73255,9 +73642,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h case Op_MemBarAcquire: { if (n->as_MemBar()->trailing_load() && n->req() > MemBarNode::Precedent) { // At parse time, the trailing MemBarAcquire for a volatile load -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/opto/memnode.cpp b/src/hotspot/share/opto/memnode.cpp ---- a/src/hotspot/share/opto/memnode.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/opto/memnode.cpp 2024-02-20 10:42:36.432196566 +0800 +diff --git a/src/hotspot/share/opto/memnode.cpp b/src/hotspot/share/opto/memnode.cpp +index 76ed95c4a78..e2fdbedd804 100644 +--- a/src/hotspot/share/opto/memnode.cpp ++++ b/src/hotspot/share/opto/memnode.cpp @@ -22,6 +22,12 @@ * */ @@ -73271,7 +73659,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/javaClasses.hpp" #include "compiler/compileLog.hpp" -@@ -3281,6 +3287,7 @@ +@@ -3281,6 +3287,7 @@ MemBarNode* MemBarNode::make(Compile* C, int opcode, int atp, Node* pn) { case Op_MemBarReleaseLock: return new MemBarReleaseLockNode(C, atp, pn); case Op_MemBarVolatile: return new MemBarVolatileNode(C, atp, pn); case Op_MemBarCPUOrder: return new MemBarCPUOrderNode(C, atp, pn); @@ -73279,9 +73667,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h case Op_OnSpinWait: return new OnSpinWaitNode(C, atp, pn); case Op_Initialize: return new InitializeNode(C, atp, pn); default: ShouldNotReachHere(); return nullptr; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/opto/memnode.hpp b/src/hotspot/share/opto/memnode.hpp ---- a/src/hotspot/share/opto/memnode.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/opto/memnode.hpp 2024-02-20 10:42:36.432196566 +0800 +diff --git a/src/hotspot/share/opto/memnode.hpp b/src/hotspot/share/opto/memnode.hpp +index e511d64ca6f..23bc631434e 100644 +--- a/src/hotspot/share/opto/memnode.hpp ++++ b/src/hotspot/share/opto/memnode.hpp @@ -22,6 +22,12 @@ * */ @@ -73295,7 +73684,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_OPTO_MEMNODE_HPP #define SHARE_OPTO_MEMNODE_HPP -@@ -1289,6 +1295,14 @@ +@@ -1289,6 +1295,14 @@ public: virtual uint ideal_reg() const { return 0; } // not matched in the AD file }; @@ -73310,9 +73699,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h class OnSpinWaitNode: public MemBarNode { public: OnSpinWaitNode(Compile* C, int alias_idx, Node* precedent) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/opto/output.cpp b/src/hotspot/share/opto/output.cpp ---- a/src/hotspot/share/opto/output.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/opto/output.cpp 2024-02-20 10:42:36.435529898 +0800 +diff --git a/src/hotspot/share/opto/output.cpp b/src/hotspot/share/opto/output.cpp +index 998be5e1225..c7c8db1dd4e 100644 +--- a/src/hotspot/share/opto/output.cpp ++++ b/src/hotspot/share/opto/output.cpp @@ -22,6 +22,12 @@ * */ @@ -73326,7 +73716,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "asm/assembler.inline.hpp" #include "asm/macroAssembler.inline.hpp" -@@ -1616,6 +1622,22 @@ +@@ -1616,6 +1622,22 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) { DEBUG_ONLY(uint instr_offset = cb->insts_size()); n->emit(*cb, C->regalloc()); current_offset = cb->insts_size(); @@ -73349,9 +73739,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Above we only verified that there is enough space in the instruction section. // However, the instruction may emit stubs that cause code buffer expansion. -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/arguments.cpp b/src/hotspot/share/runtime/arguments.cpp ---- a/src/hotspot/share/runtime/arguments.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/arguments.cpp 2024-02-20 10:42:36.455529881 +0800 +diff --git a/src/hotspot/share/runtime/arguments.cpp b/src/hotspot/share/runtime/arguments.cpp +index 720a0e9ba29..6ae1766f7fa 100644 +--- a/src/hotspot/share/runtime/arguments.cpp ++++ b/src/hotspot/share/runtime/arguments.cpp @@ -22,6 +22,12 @@ * */ @@ -73365,7 +73756,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "cds/cds_globals.hpp" #include "cds/filemap.hpp" -@@ -1904,14 +1910,14 @@ +@@ -1904,14 +1910,14 @@ bool Arguments::check_vm_args_consistency() { } #endif @@ -73382,9 +73773,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h if (LockingMode == LM_MONITOR) { jio_fprintf(defaultStream::error_stream(), "LockingMode == 0 (LM_MONITOR) is not fully implemented on this architecture"); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/continuation.cpp b/src/hotspot/share/runtime/continuation.cpp ---- a/src/hotspot/share/runtime/continuation.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/continuation.cpp 2024-02-20 10:42:36.455529881 +0800 +diff --git a/src/hotspot/share/runtime/continuation.cpp b/src/hotspot/share/runtime/continuation.cpp +index 03c0af1a572..7e468def61d 100644 +--- a/src/hotspot/share/runtime/continuation.cpp ++++ b/src/hotspot/share/runtime/continuation.cpp @@ -22,6 +22,12 @@ * */ @@ -73398,7 +73790,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/vmSymbols.hpp" #include "gc/shared/barrierSetNMethod.hpp" -@@ -224,7 +230,7 @@ +@@ -224,7 +230,7 @@ frame Continuation::continuation_parent_frame(RegisterMap* map) { map->set_stack_chunk(nullptr); @@ -73407,9 +73799,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h frame sender(cont.entrySP(), cont.entryFP(), cont.entryPC()); #else frame sender = frame(); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/continuationFreezeThaw.cpp b/src/hotspot/share/runtime/continuationFreezeThaw.cpp ---- a/src/hotspot/share/runtime/continuationFreezeThaw.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/continuationFreezeThaw.cpp 2024-02-20 10:42:36.455529881 +0800 +diff --git a/src/hotspot/share/runtime/continuationFreezeThaw.cpp b/src/hotspot/share/runtime/continuationFreezeThaw.cpp +index 36ce7a532eb..51125dd80b1 100644 +--- a/src/hotspot/share/runtime/continuationFreezeThaw.cpp ++++ b/src/hotspot/share/runtime/continuationFreezeThaw.cpp @@ -22,6 +22,12 @@ * */ @@ -73423,7 +73816,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/javaClasses.inline.hpp" #include "classfile/vmSymbols.hpp" -@@ -774,7 +780,7 @@ +@@ -774,7 +780,7 @@ frame FreezeBase::freeze_start_frame_yield_stub(frame f) { } frame FreezeBase::freeze_start_frame_safepoint_stub(frame f) { @@ -73432,7 +73825,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h f.set_fp(f.real_fp()); // f.set_fp(*Frame::callee_link_address(f)); // ???? #else Unimplemented(); -@@ -832,7 +838,7 @@ +@@ -832,7 +838,7 @@ inline freeze_result FreezeBase::recurse_freeze_java_frame(const frame& f, frame _freeze_size += fsize; NOT_PRODUCT(_frames++;) @@ -73441,7 +73834,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // We don't use FKind::frame_bottom(f) == _bottom_address because on x64 there's sometimes an extra word between // enterSpecial and an interpreted frame -@@ -1604,7 +1610,7 @@ +@@ -1604,7 +1610,7 @@ static freeze_result is_pinned0(JavaThread* thread, oop cont_scope, bool safepoi if (!safepoint) { f = f.sender(&map); // this is the yield frame } else { // safepoint yield @@ -73450,7 +73843,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h f.set_fp(f.real_fp()); // Instead of this, maybe in ContinuationWrapper::set_last_frame always use the real_fp? #else Unimplemented(); -@@ -2224,8 +2230,8 @@ +@@ -2224,8 +2230,8 @@ void ThawBase::recurse_thaw_compiled_frame(const frame& hf, frame& caller, int n // If we're the bottom-most thawed frame, we're writing to within one word from entrySP // (we might have one padding word for alignment) @@ -73461,9 +73854,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h copy_from_chunk(from, to, sz); // copying good oops because we invoked barriers above -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/javaThread.inline.hpp b/src/hotspot/share/runtime/javaThread.inline.hpp ---- a/src/hotspot/share/runtime/javaThread.inline.hpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/javaThread.inline.hpp 2024-02-20 10:42:36.462196543 +0800 +diff --git a/src/hotspot/share/runtime/javaThread.inline.hpp b/src/hotspot/share/runtime/javaThread.inline.hpp +index 7b1ad7e17e1..c7a0246e375 100644 +--- a/src/hotspot/share/runtime/javaThread.inline.hpp ++++ b/src/hotspot/share/runtime/javaThread.inline.hpp @@ -23,6 +23,12 @@ * */ @@ -73477,7 +73871,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #ifndef SHARE_RUNTIME_JAVATHREAD_INLINE_HPP #define SHARE_RUNTIME_JAVATHREAD_INLINE_HPP -@@ -138,7 +144,7 @@ +@@ -138,7 +144,7 @@ inline JavaThread::NoAsyncExceptionDeliveryMark::~NoAsyncExceptionDeliveryMark() } inline JavaThreadState JavaThread::thread_state() const { @@ -73486,7 +73880,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Use membars when accessing volatile _thread_state. See // Threads::create_vm() for size checks. return Atomic::load_acquire(&_thread_state); -@@ -150,7 +156,7 @@ +@@ -150,7 +156,7 @@ inline JavaThreadState JavaThread::thread_state() const { inline void JavaThread::set_thread_state(JavaThreadState s) { assert(current_or_null() == nullptr || current_or_null() == this, "state change should only be called by the current thread"); @@ -73495,9 +73889,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // Use membars when accessing volatile _thread_state. See // Threads::create_vm() for size checks. Atomic::release_store(&_thread_state, s); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/objectMonitor.cpp b/src/hotspot/share/runtime/objectMonitor.cpp ---- a/src/hotspot/share/runtime/objectMonitor.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/objectMonitor.cpp 2024-02-20 10:42:36.462196543 +0800 +diff --git a/src/hotspot/share/runtime/objectMonitor.cpp b/src/hotspot/share/runtime/objectMonitor.cpp +index c8952cf8af3..f2e7fb05d69 100644 +--- a/src/hotspot/share/runtime/objectMonitor.cpp ++++ b/src/hotspot/share/runtime/objectMonitor.cpp @@ -22,6 +22,12 @@ * */ @@ -73511,7 +73906,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/vmSymbols.hpp" #include "gc/shared/oopStorage.hpp" -@@ -365,6 +371,9 @@ +@@ -356,6 +362,9 @@ bool ObjectMonitor::enter(JavaThread* current) { } assert(owner_raw() != current, "invariant"); @@ -73521,7 +73916,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h assert(_succ != current, "invariant"); assert(!SafepointSynchronize::is_at_safepoint(), "invariant"); assert(current->thread_state() != _thread_blocked, "invariant"); -@@ -729,6 +738,7 @@ +@@ -717,6 +726,7 @@ void ObjectMonitor::EnterI(JavaThread* current) { } // The Spin failed -- Enqueue and park the thread ... @@ -73529,9 +73924,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h assert(_succ != current, "invariant"); assert(owner_raw() != current, "invariant"); assert(_Responsible != current, "invariant"); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/os.cpp b/src/hotspot/share/runtime/os.cpp ---- a/src/hotspot/share/runtime/os.cpp 2024-01-17 09:43:20.000000000 +0800 -+++ b/src/hotspot/share/runtime/os.cpp 2024-02-20 10:42:36.465529874 +0800 +diff --git a/src/hotspot/share/runtime/os.cpp b/src/hotspot/share/runtime/os.cpp +index a5ea07d8c64..8adb584b769 100644 +--- a/src/hotspot/share/runtime/os.cpp ++++ b/src/hotspot/share/runtime/os.cpp @@ -22,6 +22,12 @@ * */ @@ -73545,7 +73941,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/javaClasses.hpp" #include "classfile/moduleEntry.hpp" -@@ -1259,7 +1265,8 @@ +@@ -1259,7 +1265,8 @@ bool os::is_first_C_frame(frame* fr) { if ((uintptr_t)fr->sender_sp() == (uintptr_t)-1 || is_pointer_bad(fr->sender_sp())) return true; uintptr_t old_fp = (uintptr_t)fr->link_or_null(); @@ -73555,9 +73951,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h is_pointer_bad(fr->link_or_null())) return true; // stack grows downwards; if old_fp is below current fp or if the stack -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/sharedRuntime.cpp b/src/hotspot/share/runtime/sharedRuntime.cpp ---- a/src/hotspot/share/runtime/sharedRuntime.cpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/hotspot/share/runtime/sharedRuntime.cpp 2024-02-20 10:42:36.468863204 +0800 +diff --git a/src/hotspot/share/runtime/sharedRuntime.cpp b/src/hotspot/share/runtime/sharedRuntime.cpp +index edbdad4f24b..404d9113f48 100644 +--- a/src/hotspot/share/runtime/sharedRuntime.cpp ++++ b/src/hotspot/share/runtime/sharedRuntime.cpp @@ -22,6 +22,12 @@ * */ @@ -73571,7 +73968,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/javaClasses.inline.hpp" #include "classfile/stringTable.hpp" -@@ -3063,7 +3069,7 @@ +@@ -3063,7 +3069,7 @@ void AdapterHandlerLibrary::create_native_wrapper(const methodHandle& method) { struct { double data[20]; } locs_buf; struct { double data[20]; } stubs_locs_buf; buffer.insts()->initialize_shared_locs((relocInfo*)&locs_buf, sizeof(locs_buf) / sizeof(relocInfo)); @@ -73580,9 +73977,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h // On AArch64 with ZGC and nmethod entry barriers, we need all oops to be // in the constant pool to ensure ordering between the barrier and oops // accesses. For native_wrappers we need a constant. -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ---- a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp 2024-02-20 10:42:36.468863204 +0800 +diff --git a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp +index fac76262f3c..f41cf843d31 100644 +--- a/src/hotspot/share/runtime/sharedRuntimeTrig.cpp ++++ b/src/hotspot/share/runtime/sharedRuntimeTrig.cpp @@ -22,6 +22,13 @@ * */ @@ -73597,7 +73995,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "jni.h" #include "runtime/interfaceSupport.inline.hpp" -@@ -503,6 +510,14 @@ +@@ -503,6 +510,14 @@ static int __ieee754_rem_pio2(double x, double *y) { * sin(x) = x + (S1*x + (x *(r-y/2)+y)) */ @@ -73612,7 +74010,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h static const double S1 = -1.66666666666666324348e-01, /* 0xBFC55555, 0x55555549 */ S2 = 8.33333333332248946124e-03, /* 0x3F811111, 0x1110F8A6 */ -@@ -510,6 +525,7 @@ +@@ -510,6 +525,7 @@ S3 = -1.98412698298579493134e-04, /* 0xBF2A01A0, 0x19C161D5 */ S4 = 2.75573137070700676789e-06, /* 0x3EC71DE3, 0x57B1FE7D */ S5 = -2.50507602534068634195e-08, /* 0xBE5AE5E6, 0x8A2B9CEB */ S6 = 1.58969099521155010221e-10; /* 0x3DE5D93A, 0x5ACFD57C */ @@ -73620,9 +74018,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h static double __kernel_sin(double x, double y, int iy) { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/synchronizer.cpp b/src/hotspot/share/runtime/synchronizer.cpp ---- a/src/hotspot/share/runtime/synchronizer.cpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/hotspot/share/runtime/synchronizer.cpp 2024-02-20 10:42:36.468863204 +0800 +diff --git a/src/hotspot/share/runtime/synchronizer.cpp b/src/hotspot/share/runtime/synchronizer.cpp +index 6e6f2115e1e..fdd94b21883 100644 +--- a/src/hotspot/share/runtime/synchronizer.cpp ++++ b/src/hotspot/share/runtime/synchronizer.cpp @@ -22,6 +22,12 @@ * */ @@ -73636,7 +74035,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #include "precompiled.hpp" #include "classfile/vmSymbols.hpp" #include "gc/shared/collectedHeap.hpp" -@@ -487,7 +493,7 @@ +@@ -487,7 +493,7 @@ void ObjectSynchronizer::handle_sync_on_value_based_class(Handle obj, JavaThread } static bool useHeavyMonitors() { @@ -73645,9 +74044,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h return LockingMode == LM_MONITOR; #else return false; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/runtime/vmStructs.cpp b/src/hotspot/share/runtime/vmStructs.cpp ---- a/src/hotspot/share/runtime/vmStructs.cpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/hotspot/share/runtime/vmStructs.cpp 2024-02-20 10:42:36.472196536 +0800 +diff --git a/src/hotspot/share/runtime/vmStructs.cpp b/src/hotspot/share/runtime/vmStructs.cpp +index 37241534b2b..f7302bea5f7 100644 +--- a/src/hotspot/share/runtime/vmStructs.cpp ++++ b/src/hotspot/share/runtime/vmStructs.cpp @@ -22,6 +22,12 @@ * */ @@ -73669,9 +74069,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h declare_c2_type(OnSpinWaitNode, MemBarNode) \ declare_c2_type(BlackholeNode, MultiNode) \ declare_c2_type(InitializeNode, MemBarNode) \ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/hotspot/share/utilities/macros.hpp b/src/hotspot/share/utilities/macros.hpp ---- a/src/hotspot/share/utilities/macros.hpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/hotspot/share/utilities/macros.hpp 2024-02-20 10:42:36.482196528 +0800 +diff --git a/src/hotspot/share/utilities/macros.hpp b/src/hotspot/share/utilities/macros.hpp +index bfbaaa58acc..74e56975081 100644 +--- a/src/hotspot/share/utilities/macros.hpp ++++ b/src/hotspot/share/utilities/macros.hpp @@ -22,6 +22,12 @@ * */ @@ -73704,9 +74105,48 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/h #if defined(PPC32) || defined(PPC64) #ifndef PPC #define PPC -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java b/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java 2024-02-20 10:42:36.685529702 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/foreign/CABI.java b/src/java.base/share/classes/jdk/internal/foreign/CABI.java +index d376a196333..5ceb511ec90 100644 +--- a/src/java.base/share/classes/jdk/internal/foreign/CABI.java ++++ b/src/java.base/share/classes/jdk/internal/foreign/CABI.java +@@ -23,6 +23,12 @@ + * questions. + * + */ ++ ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ + package jdk.internal.foreign; + + import jdk.internal.foreign.abi.fallback.FallbackLinker; +@@ -42,6 +48,7 @@ public enum CABI { + LINUX_PPC_64_LE, + LINUX_RISCV_64, + LINUX_S390, ++ LINUX_LOONGARCH_64, + FALLBACK, + UNSUPPORTED; + +@@ -86,7 +93,11 @@ public enum CABI { + if (OperatingSystem.isLinux()) { + return LINUX_S390; + } +- } ++ } else if (arch.equals("loongarch64")) { ++ if (OperatingSystem.isLinux()) { ++ return LINUX_LOONGARCH_64; ++ } ++ } + } else if (FallbackLinker.isSupported()) { + return FALLBACK; // fallback linker + } +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java b/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java +index 8a322cdcf7a..4ab3845d35e 100644 +--- a/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/AbstractLinker.java @@ -22,6 +22,12 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -73720,7 +74160,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package jdk.internal.foreign.abi; import jdk.internal.foreign.SystemLookup; -@@ -30,6 +36,7 @@ +@@ -30,6 +36,7 @@ import jdk.internal.foreign.abi.aarch64.linux.LinuxAArch64Linker; import jdk.internal.foreign.abi.aarch64.macos.MacOsAArch64Linker; import jdk.internal.foreign.abi.aarch64.windows.WindowsAArch64Linker; import jdk.internal.foreign.abi.fallback.FallbackLinker; @@ -73728,7 +74168,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j import jdk.internal.foreign.abi.ppc64.linux.LinuxPPC64leLinker; import jdk.internal.foreign.abi.riscv64.linux.LinuxRISCV64Linker; import jdk.internal.foreign.abi.s390.linux.LinuxS390Linker; -@@ -62,6 +69,7 @@ +@@ -62,6 +69,7 @@ public abstract sealed class AbstractLinker implements Linker permits LinuxAArch SysVx64Linker, WindowsAArch64Linker, Windowsx64Linker, LinuxPPC64leLinker, LinuxRISCV64Linker, LinuxS390Linker, @@ -73736,9 +74176,229 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j FallbackLinker { public interface UpcallStubFactory { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java 2024-02-20 10:42:36.688863032 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java b/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java +index 92d10a1dbdf..40cc94cda13 100644 +--- a/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java +@@ -22,6 +22,12 @@ + * or visit www.oracle.com if you need additional information or have any + * questions. + */ ++ ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ + package jdk.internal.foreign.abi; + + import jdk.internal.access.JavaLangAccess; +@@ -33,6 +39,7 @@ import jdk.internal.foreign.abi.aarch64.linux.LinuxAArch64Linker; + import jdk.internal.foreign.abi.aarch64.macos.MacOsAArch64Linker; + import jdk.internal.foreign.abi.aarch64.windows.WindowsAArch64Linker; + import jdk.internal.foreign.abi.fallback.FallbackLinker; ++import jdk.internal.foreign.abi.loongarch64.linux.LinuxLoongArch64Linker; + import jdk.internal.foreign.abi.ppc64.linux.LinuxPPC64leLinker; + import jdk.internal.foreign.abi.riscv64.linux.LinuxRISCV64Linker; + import jdk.internal.foreign.abi.s390.linux.LinuxS390Linker; +@@ -244,6 +251,7 @@ public final class SharedUtils { + case LINUX_PPC_64_LE -> LinuxPPC64leLinker.getInstance(); + case LINUX_RISCV_64 -> LinuxRISCV64Linker.getInstance(); + case LINUX_S390 -> LinuxS390Linker.getInstance(); ++ case LINUX_LOONGARCH_64 -> LinuxLoongArch64Linker.getInstance(); + case FALLBACK -> FallbackLinker.getInstance(); + case UNSUPPORTED -> throw new UnsupportedOperationException("Platform does not support native linker"); + }; +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java +new file mode 100644 +index 00000000000..aec9e531708 +--- /dev/null ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java +@@ -0,0 +1,179 @@ ++/* ++ * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. Oracle designates this ++ * particular file as subject to the "Classpath" exception as provided ++ * by Oracle in the LICENSE file that accompanied this code. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ */ ++ ++package jdk.internal.foreign.abi.loongarch64; ++ ++import jdk.internal.foreign.abi.ABIDescriptor; ++import jdk.internal.foreign.abi.Architecture; ++import jdk.internal.foreign.abi.StubLocations; ++import jdk.internal.foreign.abi.VMStorage; ++import jdk.internal.foreign.abi.loongarch64.linux.TypeClass; ++ ++public final class LoongArch64Architecture implements Architecture { ++ public static final Architecture INSTANCE = new LoongArch64Architecture(); ++ ++ private static final short REG64_MASK = 0b0000_0000_0000_0001; ++ private static final short FLOAT64_MASK = 0b0000_0000_0000_0001; ++ ++ private static final int INTEGER_REG_SIZE = 8; ++ private static final int FLOAT_REG_SIZE = 8; ++ ++ // Suppresses default constructor, ensuring non-instantiability. ++ private LoongArch64Architecture() {} ++ ++ @Override ++ public boolean isStackType(int cls) { ++ return cls == StorageType.STACK; ++ } ++ ++ @Override ++ public int typeSize(int cls) { ++ return switch (cls) { ++ case StorageType.INTEGER -> INTEGER_REG_SIZE; ++ case StorageType.FLOAT -> FLOAT_REG_SIZE; ++ // STACK is deliberately omitted ++ default -> throw new IllegalArgumentException("Invalid Storage Class: " + cls); ++ }; ++ } ++ ++ public interface StorageType { ++ byte INTEGER = 0; ++ byte FLOAT = 1; ++ byte STACK = 2; ++ byte PLACEHOLDER = 3; ++ } ++ ++ public static class Regs { // break circular dependency ++ public static final VMStorage r0 = integerRegister(0, "zero"); ++ public static final VMStorage ra = integerRegister(1, "ra"); ++ public static final VMStorage tp = integerRegister(2, "tp"); ++ public static final VMStorage sp = integerRegister(3, "sp"); ++ public static final VMStorage a0 = integerRegister(4, "a0"); ++ public static final VMStorage a1 = integerRegister(5, "a1"); ++ public static final VMStorage a2 = integerRegister(6, "a2"); ++ public static final VMStorage a3 = integerRegister(7, "a3"); ++ public static final VMStorage a4 = integerRegister(8, "a4"); ++ public static final VMStorage a5 = integerRegister(9, "a5"); ++ public static final VMStorage a6 = integerRegister(10, "a6"); ++ public static final VMStorage a7 = integerRegister(11, "a7"); ++ public static final VMStorage t0 = integerRegister(12, "t0"); ++ public static final VMStorage t1 = integerRegister(13, "t1"); ++ public static final VMStorage t2 = integerRegister(14, "t2"); ++ public static final VMStorage t3 = integerRegister(15, "t3"); ++ public static final VMStorage t4 = integerRegister(16, "t4"); ++ public static final VMStorage t5 = integerRegister(17, "t5"); ++ public static final VMStorage t6 = integerRegister(18, "t6"); ++ public static final VMStorage t7 = integerRegister(19, "t7"); ++ public static final VMStorage t8 = integerRegister(20, "t8"); ++ public static final VMStorage rx = integerRegister(21, "rx"); ++ public static final VMStorage fp = integerRegister(22, "fp"); ++ public static final VMStorage s0 = integerRegister(23, "s0"); ++ public static final VMStorage s1 = integerRegister(24, "s1"); ++ public static final VMStorage s2 = integerRegister(25, "s2"); ++ public static final VMStorage s3 = integerRegister(26, "s3"); ++ public static final VMStorage s4 = integerRegister(27, "s4"); ++ public static final VMStorage s5 = integerRegister(28, "s5"); ++ public static final VMStorage s6 = integerRegister(29, "s6"); ++ public static final VMStorage s7 = integerRegister(30, "s7"); ++ public static final VMStorage s8 = integerRegister(31, "s8"); ++ ++ public static final VMStorage f0 = floatRegister(0, "f0"); ++ public static final VMStorage f1 = floatRegister(1, "f1"); ++ public static final VMStorage f2 = floatRegister(2, "f2"); ++ public static final VMStorage f3 = floatRegister(3, "f3"); ++ public static final VMStorage f4 = floatRegister(4, "f4"); ++ public static final VMStorage f5 = floatRegister(5, "f5"); ++ public static final VMStorage f6 = floatRegister(6, "f6"); ++ public static final VMStorage f7 = floatRegister(7, "f7"); ++ public static final VMStorage f8 = floatRegister(8, "f8"); ++ public static final VMStorage f9 = floatRegister(9, "f9"); ++ public static final VMStorage f10 = floatRegister(10, "f10"); ++ public static final VMStorage f11 = floatRegister(11, "f11"); ++ public static final VMStorage f12 = floatRegister(12, "f12"); ++ public static final VMStorage f13 = floatRegister(13, "f13"); ++ public static final VMStorage f14 = floatRegister(14, "f14"); ++ public static final VMStorage f15 = floatRegister(15, "f15"); ++ public static final VMStorage f16 = floatRegister(16, "f16"); ++ public static final VMStorage f17 = floatRegister(17, "f17"); ++ public static final VMStorage f18 = floatRegister(18, "f18"); ++ public static final VMStorage f19 = floatRegister(19, "f19"); ++ public static final VMStorage f20 = floatRegister(20, "f20"); ++ public static final VMStorage f21 = floatRegister(21, "f21"); ++ public static final VMStorage f22 = floatRegister(22, "f22"); ++ public static final VMStorage f23 = floatRegister(23, "f23"); ++ public static final VMStorage f24 = floatRegister(24, "f24"); ++ public static final VMStorage f25 = floatRegister(25, "f25"); ++ public static final VMStorage f26 = floatRegister(26, "f26"); ++ public static final VMStorage f27 = floatRegister(27, "f27"); ++ public static final VMStorage f28 = floatRegister(28, "f28"); ++ public static final VMStorage f29 = floatRegister(29, "f29"); ++ public static final VMStorage f30 = floatRegister(30, "f30"); ++ public static final VMStorage f31 = floatRegister(31, "f31"); ++ } ++ ++ private static VMStorage integerRegister(int index, String debugName) { ++ return new VMStorage(StorageType.INTEGER, REG64_MASK, index, debugName); ++ } ++ ++ private static VMStorage floatRegister(int index, String debugName) { ++ return new VMStorage(StorageType.FLOAT, FLOAT64_MASK, index, debugName); ++ } ++ ++ public static VMStorage stackStorage(short size, int byteOffset) { ++ return new VMStorage(StorageType.STACK, size, byteOffset); ++ } ++ ++ public static ABIDescriptor abiFor(VMStorage[] inputIntRegs, ++ VMStorage[] inputFloatRegs, ++ VMStorage[] outputIntRegs, ++ VMStorage[] outputFloatRegs, ++ VMStorage[] volatileIntRegs, ++ VMStorage[] volatileFloatRegs, ++ int stackAlignment, ++ int shadowSpace, ++ VMStorage scratch1, VMStorage scratch2) { ++ return new ABIDescriptor( ++ INSTANCE, ++ new VMStorage[][]{ ++ inputIntRegs, ++ inputFloatRegs, ++ }, ++ new VMStorage[][]{ ++ outputIntRegs, ++ outputFloatRegs, ++ }, ++ new VMStorage[][]{ ++ volatileIntRegs, ++ volatileFloatRegs, ++ }, ++ stackAlignment, ++ shadowSpace, ++ scratch1, scratch2, ++ StubLocations.TARGET_ADDRESS.storage(StorageType.PLACEHOLDER), ++ StubLocations.RETURN_BUFFER.storage(StorageType.PLACEHOLDER), ++ StubLocations.CAPTURED_STATE_BUFFER.storage(StorageType.PLACEHOLDER)); ++ } ++} +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java +new file mode 100644 +index 00000000000..97e84a28b64 +--- /dev/null ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64CallArranger.java @@ -0,0 +1,472 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -74212,9 +74872,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java 2024-02-20 10:42:36.688863032 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java +new file mode 100644 +index 00000000000..c231a91b1bb +--- /dev/null ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/LinuxLoongArch64Linker.java @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -74281,9 +74943,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return ByteOrder.LITTLE_ENDIAN; + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java 2024-02-20 10:42:36.688863032 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java +new file mode 100644 +index 00000000000..117eb529434 +--- /dev/null ++++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/linux/TypeClass.java @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -74502,261 +75166,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/loongarch64/LoongArch64Architecture.java 2024-02-20 10:42:36.688863032 +0800 -@@ -0,0 +1,179 @@ -+/* -+ * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. Oracle designates this -+ * particular file as subject to the "Classpath" exception as provided -+ * by Oracle in the LICENSE file that accompanied this code. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ */ -+ -+package jdk.internal.foreign.abi.loongarch64; -+ -+import jdk.internal.foreign.abi.ABIDescriptor; -+import jdk.internal.foreign.abi.Architecture; -+import jdk.internal.foreign.abi.StubLocations; -+import jdk.internal.foreign.abi.VMStorage; -+import jdk.internal.foreign.abi.loongarch64.linux.TypeClass; -+ -+public final class LoongArch64Architecture implements Architecture { -+ public static final Architecture INSTANCE = new LoongArch64Architecture(); -+ -+ private static final short REG64_MASK = 0b0000_0000_0000_0001; -+ private static final short FLOAT64_MASK = 0b0000_0000_0000_0001; -+ -+ private static final int INTEGER_REG_SIZE = 8; -+ private static final int FLOAT_REG_SIZE = 8; -+ -+ // Suppresses default constructor, ensuring non-instantiability. -+ private LoongArch64Architecture() {} -+ -+ @Override -+ public boolean isStackType(int cls) { -+ return cls == StorageType.STACK; -+ } -+ -+ @Override -+ public int typeSize(int cls) { -+ return switch (cls) { -+ case StorageType.INTEGER -> INTEGER_REG_SIZE; -+ case StorageType.FLOAT -> FLOAT_REG_SIZE; -+ // STACK is deliberately omitted -+ default -> throw new IllegalArgumentException("Invalid Storage Class: " + cls); -+ }; -+ } -+ -+ public interface StorageType { -+ byte INTEGER = 0; -+ byte FLOAT = 1; -+ byte STACK = 2; -+ byte PLACEHOLDER = 3; -+ } -+ -+ public static class Regs { // break circular dependency -+ public static final VMStorage r0 = integerRegister(0, "zero"); -+ public static final VMStorage ra = integerRegister(1, "ra"); -+ public static final VMStorage tp = integerRegister(2, "tp"); -+ public static final VMStorage sp = integerRegister(3, "sp"); -+ public static final VMStorage a0 = integerRegister(4, "a0"); -+ public static final VMStorage a1 = integerRegister(5, "a1"); -+ public static final VMStorage a2 = integerRegister(6, "a2"); -+ public static final VMStorage a3 = integerRegister(7, "a3"); -+ public static final VMStorage a4 = integerRegister(8, "a4"); -+ public static final VMStorage a5 = integerRegister(9, "a5"); -+ public static final VMStorage a6 = integerRegister(10, "a6"); -+ public static final VMStorage a7 = integerRegister(11, "a7"); -+ public static final VMStorage t0 = integerRegister(12, "t0"); -+ public static final VMStorage t1 = integerRegister(13, "t1"); -+ public static final VMStorage t2 = integerRegister(14, "t2"); -+ public static final VMStorage t3 = integerRegister(15, "t3"); -+ public static final VMStorage t4 = integerRegister(16, "t4"); -+ public static final VMStorage t5 = integerRegister(17, "t5"); -+ public static final VMStorage t6 = integerRegister(18, "t6"); -+ public static final VMStorage t7 = integerRegister(19, "t7"); -+ public static final VMStorage t8 = integerRegister(20, "t8"); -+ public static final VMStorage rx = integerRegister(21, "rx"); -+ public static final VMStorage fp = integerRegister(22, "fp"); -+ public static final VMStorage s0 = integerRegister(23, "s0"); -+ public static final VMStorage s1 = integerRegister(24, "s1"); -+ public static final VMStorage s2 = integerRegister(25, "s2"); -+ public static final VMStorage s3 = integerRegister(26, "s3"); -+ public static final VMStorage s4 = integerRegister(27, "s4"); -+ public static final VMStorage s5 = integerRegister(28, "s5"); -+ public static final VMStorage s6 = integerRegister(29, "s6"); -+ public static final VMStorage s7 = integerRegister(30, "s7"); -+ public static final VMStorage s8 = integerRegister(31, "s8"); -+ -+ public static final VMStorage f0 = floatRegister(0, "f0"); -+ public static final VMStorage f1 = floatRegister(1, "f1"); -+ public static final VMStorage f2 = floatRegister(2, "f2"); -+ public static final VMStorage f3 = floatRegister(3, "f3"); -+ public static final VMStorage f4 = floatRegister(4, "f4"); -+ public static final VMStorage f5 = floatRegister(5, "f5"); -+ public static final VMStorage f6 = floatRegister(6, "f6"); -+ public static final VMStorage f7 = floatRegister(7, "f7"); -+ public static final VMStorage f8 = floatRegister(8, "f8"); -+ public static final VMStorage f9 = floatRegister(9, "f9"); -+ public static final VMStorage f10 = floatRegister(10, "f10"); -+ public static final VMStorage f11 = floatRegister(11, "f11"); -+ public static final VMStorage f12 = floatRegister(12, "f12"); -+ public static final VMStorage f13 = floatRegister(13, "f13"); -+ public static final VMStorage f14 = floatRegister(14, "f14"); -+ public static final VMStorage f15 = floatRegister(15, "f15"); -+ public static final VMStorage f16 = floatRegister(16, "f16"); -+ public static final VMStorage f17 = floatRegister(17, "f17"); -+ public static final VMStorage f18 = floatRegister(18, "f18"); -+ public static final VMStorage f19 = floatRegister(19, "f19"); -+ public static final VMStorage f20 = floatRegister(20, "f20"); -+ public static final VMStorage f21 = floatRegister(21, "f21"); -+ public static final VMStorage f22 = floatRegister(22, "f22"); -+ public static final VMStorage f23 = floatRegister(23, "f23"); -+ public static final VMStorage f24 = floatRegister(24, "f24"); -+ public static final VMStorage f25 = floatRegister(25, "f25"); -+ public static final VMStorage f26 = floatRegister(26, "f26"); -+ public static final VMStorage f27 = floatRegister(27, "f27"); -+ public static final VMStorage f28 = floatRegister(28, "f28"); -+ public static final VMStorage f29 = floatRegister(29, "f29"); -+ public static final VMStorage f30 = floatRegister(30, "f30"); -+ public static final VMStorage f31 = floatRegister(31, "f31"); -+ } -+ -+ private static VMStorage integerRegister(int index, String debugName) { -+ return new VMStorage(StorageType.INTEGER, REG64_MASK, index, debugName); -+ } -+ -+ private static VMStorage floatRegister(int index, String debugName) { -+ return new VMStorage(StorageType.FLOAT, FLOAT64_MASK, index, debugName); -+ } -+ -+ public static VMStorage stackStorage(short size, int byteOffset) { -+ return new VMStorage(StorageType.STACK, size, byteOffset); -+ } -+ -+ public static ABIDescriptor abiFor(VMStorage[] inputIntRegs, -+ VMStorage[] inputFloatRegs, -+ VMStorage[] outputIntRegs, -+ VMStorage[] outputFloatRegs, -+ VMStorage[] volatileIntRegs, -+ VMStorage[] volatileFloatRegs, -+ int stackAlignment, -+ int shadowSpace, -+ VMStorage scratch1, VMStorage scratch2) { -+ return new ABIDescriptor( -+ INSTANCE, -+ new VMStorage[][]{ -+ inputIntRegs, -+ inputFloatRegs, -+ }, -+ new VMStorage[][]{ -+ outputIntRegs, -+ outputFloatRegs, -+ }, -+ new VMStorage[][]{ -+ volatileIntRegs, -+ volatileFloatRegs, -+ }, -+ stackAlignment, -+ shadowSpace, -+ scratch1, scratch2, -+ StubLocations.TARGET_ADDRESS.storage(StorageType.PLACEHOLDER), -+ StubLocations.RETURN_BUFFER.storage(StorageType.PLACEHOLDER), -+ StubLocations.CAPTURED_STATE_BUFFER.storage(StorageType.PLACEHOLDER)); -+ } -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java b/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java ---- a/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/abi/SharedUtils.java 2024-02-20 10:42:36.685529702 +0800 -@@ -22,6 +22,12 @@ - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -+ -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ - package jdk.internal.foreign.abi; - - import jdk.internal.access.JavaLangAccess; -@@ -33,6 +39,7 @@ - import jdk.internal.foreign.abi.aarch64.macos.MacOsAArch64Linker; - import jdk.internal.foreign.abi.aarch64.windows.WindowsAArch64Linker; - import jdk.internal.foreign.abi.fallback.FallbackLinker; -+import jdk.internal.foreign.abi.loongarch64.linux.LinuxLoongArch64Linker; - import jdk.internal.foreign.abi.ppc64.linux.LinuxPPC64leLinker; - import jdk.internal.foreign.abi.riscv64.linux.LinuxRISCV64Linker; - import jdk.internal.foreign.abi.s390.linux.LinuxS390Linker; -@@ -244,6 +251,7 @@ - case LINUX_PPC_64_LE -> LinuxPPC64leLinker.getInstance(); - case LINUX_RISCV_64 -> LinuxRISCV64Linker.getInstance(); - case LINUX_S390 -> LinuxS390Linker.getInstance(); -+ case LINUX_LOONGARCH_64 -> LinuxLoongArch64Linker.getInstance(); - case FALLBACK -> FallbackLinker.getInstance(); - case UNSUPPORTED -> throw new UnsupportedOperationException("Platform does not support native linker"); - }; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/foreign/CABI.java b/src/java.base/share/classes/jdk/internal/foreign/CABI.java ---- a/src/java.base/share/classes/jdk/internal/foreign/CABI.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/foreign/CABI.java 2024-02-20 10:42:36.685529702 +0800 -@@ -23,6 +23,12 @@ - * questions. - * - */ -+ -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ - package jdk.internal.foreign; - - import jdk.internal.foreign.abi.fallback.FallbackLinker; -@@ -42,6 +48,7 @@ - LINUX_PPC_64_LE, - LINUX_RISCV_64, - LINUX_S390, -+ LINUX_LOONGARCH_64, - FALLBACK, - UNSUPPORTED; - -@@ -86,7 +93,11 @@ - if (OperatingSystem.isLinux()) { - return LINUX_S390; - } -- } -+ } else if (arch.equals("loongarch64")) { -+ if (OperatingSystem.isLinux()) { -+ return LINUX_LOONGARCH_64; -+ } -+ } - } else if (FallbackLinker.isSupported()) { - return FALLBACK; // fallback linker - } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/util/Architecture.java b/src/java.base/share/classes/jdk/internal/util/Architecture.java ---- a/src/java.base/share/classes/jdk/internal/util/Architecture.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/util/Architecture.java 2024-02-20 10:42:36.725529669 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/util/Architecture.java b/src/java.base/share/classes/jdk/internal/util/Architecture.java +index 5c861902743..f48d3a63204 100644 +--- a/src/java.base/share/classes/jdk/internal/util/Architecture.java ++++ b/src/java.base/share/classes/jdk/internal/util/Architecture.java @@ -22,6 +22,14 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -74772,9 +75185,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package jdk.internal.util; import jdk.internal.vm.annotation.ForceInline; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template b/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template ---- a/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template 2024-02-20 10:42:36.725529669 +0800 +diff --git a/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template b/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template +index 9c2a2c84511..c0720ad7b9d 100644 +--- a/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template ++++ b/src/java.base/share/classes/jdk/internal/util/PlatformProps.java.template @@ -22,6 +22,14 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -74790,35 +75204,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package jdk.internal.util; /** -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ---- a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h 2024-02-20 10:42:37.642195613 +0800 -@@ -22,6 +22,13 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ -+ - #ifndef _LIBPROC_H_ - #define _LIBPROC_H_ - -@@ -37,7 +44,7 @@ - #include - #define user_regs_struct pt_regs - #endif --#if defined(aarch64) || defined(arm64) -+#if defined(aarch64) || defined(arm64) || defined(loongarch64) - #include - #define user_regs_struct user_pt_regs - #elif defined(arm) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp ---- a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp 2024-02-20 10:42:37.642195613 +0800 +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp +index bebf8d0f05a..44d2a6342a1 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/LinuxDebuggerLocal.cpp @@ -23,6 +23,13 @@ * */ @@ -74844,7 +75233,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j #ifdef riscv64 #include "sun_jvm_hotspot_debugger_riscv64_RISCV64ThreadContext.h" #endif -@@ -411,7 +422,7 @@ +@@ -411,7 +422,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo return (err == PS_OK)? array : 0; } @@ -74853,7 +75242,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j extern "C" JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0 (JNIEnv *env, jobject this_obj, jint lwp_id) { -@@ -443,6 +454,9 @@ +@@ -443,6 +454,9 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo #ifdef aarch64 #define NPRGREG sun_jvm_hotspot_debugger_aarch64_AARCH64ThreadContext_NPRGREG #endif @@ -74863,7 +75252,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j #ifdef riscv64 #define NPRGREG sun_jvm_hotspot_debugger_riscv64_RISCV64ThreadContext_NPRGREG #endif -@@ -522,6 +536,18 @@ +@@ -522,6 +536,18 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo } #endif /* aarch64 */ @@ -74882,9 +75271,37 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j #if defined(riscv64) #define REG_INDEX(reg) sun_jvm_hotspot_debugger_riscv64_RISCV64ThreadContext_##reg -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ---- a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c 2024-02-20 10:42:37.642195613 +0800 +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h +index a69496e77a4..d2e77252769 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/libproc.h +@@ -22,6 +22,13 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ ++ + #ifndef _LIBPROC_H_ + #define _LIBPROC_H_ + +@@ -37,7 +44,7 @@ + #include + #define user_regs_struct pt_regs + #endif +-#if defined(aarch64) || defined(arm64) ++#if defined(aarch64) || defined(arm64) || defined(loongarch64) + #include + #define user_regs_struct user_pt_regs + #elif defined(arm) +diff --git a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c +index 3068f475626..d35cc73221f 100644 +--- a/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c ++++ b/src/jdk.hotspot.agent/linux/native/libsaproc/ps_proc.c @@ -22,6 +22,12 @@ * */ @@ -74898,7 +75315,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j #include #include #include -@@ -143,7 +149,7 @@ +@@ -143,7 +149,7 @@ static bool process_get_lwp_regs(struct ps_prochandle* ph, pid_t pid, struct use return false; } return true; @@ -74907,9 +75324,91 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j if (ptrace(PTRACE_GETREGS_REQ, pid, NULL, user) < 0) { print_debug("ptrace(PTRACE_GETREGS, ...) failed for lwp(%d) errno(%d) \"%s\"\n", pid, errno, strerror(errno)); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java 2024-02-20 10:42:37.655528938 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +index 71ed978199c..194088c697a 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java +@@ -23,6 +23,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2018, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ * ++ */ + package sun.jvm.hotspot; + + import java.rmi.RemoteException; +@@ -38,6 +44,7 @@ import sun.jvm.hotspot.debugger.MachineDescriptionPPC64; + import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; + import sun.jvm.hotspot.debugger.MachineDescriptionRISCV64; + import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; ++import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; + import sun.jvm.hotspot.debugger.NoSuchSymbolException; + import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; + import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; +@@ -557,6 +564,8 @@ public class HotSpotAgent { + machDesc = new MachineDescriptionAArch64(); + } else if (cpu.equals("riscv64")) { + machDesc = new MachineDescriptionRISCV64(); ++ } else if (cpu.equals("loongarch64")) { ++ machDesc = new MachineDescriptionLOONGARCH64(); + } else { + try { + machDesc = (MachineDescription) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +new file mode 100644 +index 00000000000..99cea8c7f14 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java +@@ -0,0 +1,41 @@ ++/* ++ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. ++ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++package sun.jvm.hotspot.debugger; ++ ++public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { ++ public long getAddressSize() { ++ return 8; ++ } ++ ++ ++ public boolean isBigEndian() { ++ return false; ++ } ++ ++ public boolean isLP64() { ++ return true; ++ } ++} +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java +index c100c160947..0b87e7922e7 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxCDebugger.java @@ -23,6 +23,12 @@ * */ @@ -74923,7 +75422,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package sun.jvm.hotspot.debugger.linux; import java.io.*; -@@ -33,12 +39,14 @@ +@@ -33,12 +39,14 @@ import sun.jvm.hotspot.debugger.cdbg.*; import sun.jvm.hotspot.debugger.x86.*; import sun.jvm.hotspot.debugger.amd64.*; import sun.jvm.hotspot.debugger.aarch64.*; @@ -74938,7 +75437,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j import sun.jvm.hotspot.debugger.linux.riscv64.*; import sun.jvm.hotspot.utilities.*; -@@ -93,7 +101,14 @@ +@@ -93,7 +101,14 @@ class LinuxCDebugger implements CDebugger { Address pc = context.getRegisterAsAddress(AMD64ThreadContext.RIP); if (pc == null) return null; return LinuxAMD64CFrame.getTopFrame(dbg, pc, context); @@ -74954,9 +75453,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j PPC64ThreadContext context = (PPC64ThreadContext) thread.getContext(); Address sp = context.getRegisterAsAddress(PPC64ThreadContext.SP); if (sp == null) return null; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java 2024-02-20 10:42:37.655528938 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java +index 69a34fe2afa..da07fe91258 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/LinuxThreadContextFactory.java @@ -22,6 +22,12 @@ * */ @@ -74970,7 +75470,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package sun.jvm.hotspot.debugger.linux; import java.lang.reflect.*; -@@ -29,6 +35,7 @@ +@@ -29,6 +35,7 @@ import sun.jvm.hotspot.debugger.*; import sun.jvm.hotspot.debugger.linux.amd64.*; import sun.jvm.hotspot.debugger.linux.x86.*; import sun.jvm.hotspot.debugger.linux.ppc64.*; @@ -74978,7 +75478,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j class LinuxThreadContextFactory { static ThreadContext createThreadContext(LinuxDebugger dbg) { -@@ -37,7 +44,9 @@ +@@ -37,7 +44,9 @@ class LinuxThreadContextFactory { return new LinuxX86ThreadContext(dbg); } else if (cpu.equals("amd64")) { return new LinuxAMD64ThreadContext(dbg); @@ -74989,9 +75489,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j return new LinuxPPC64ThreadContext(dbg); } else { try { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java 2024-02-20 10:42:37.655528938 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java +new file mode 100644 +index 00000000000..0e6caee5a49 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64CFrame.java @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. @@ -75085,9 +75587,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + private Address fp; + private LinuxDebugger dbg; +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java 2024-02-20 10:42:37.655528938 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java +new file mode 100644 +index 00000000000..604642598e0 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/linux/loongarch64/LinuxLOONGARCH64ThreadContext.java @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. @@ -75136,9 +75640,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return debugger.newAddress(getRegister(index)); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java 2024-02-20 10:42:37.658862267 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java +new file mode 100644 +index 00000000000..1de3cb1a472 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/loongarch64/LOONGARCH64ThreadContext.java @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. @@ -75165,157 +75671,113 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + * + */ + -+package sun.jvm.hotspot.debugger.loongarch64; -+ -+import java.lang.annotation.Native; -+ -+import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.cdbg.*; -+ -+/** Specifies the thread context on loongarch64 platforms; only a sub-portion -+ of the context is guaranteed to be present on all operating -+ systems. */ -+ -+public abstract class LOONGARCH64ThreadContext implements ThreadContext { -+ -+ // NOTE: the indices for the various registers must be maintained as -+ // listed across various operating systems. However, only a small -+ // subset of the registers' values are guaranteed to be present (and -+ // must be present for the SA's stack walking to work): EAX, EBX, -+ // ECX, EDX, ESI, EDI, EBP, ESP, and EIP. -+ -+ // One instance of the Native annotation is enough to trigger header generation -+ // for this file. -+ @Native -+ public static final int ZERO = 0; -+ public static final int RA = 1; -+ public static final int TP = 2; -+ public static final int SP = 3; -+ public static final int A0 = 4; -+ public static final int A1 = 5; -+ public static final int A2 = 6; -+ public static final int A3 = 7; -+ public static final int A4 = 8; -+ public static final int A5 = 9; -+ public static final int A6 = 10; -+ public static final int A7 = 11; -+ public static final int T0 = 12; -+ public static final int T1 = 13; -+ public static final int T2 = 14; -+ public static final int T3 = 15; -+ public static final int T4 = 16; -+ public static final int T5 = 17; -+ public static final int T6 = 18; -+ public static final int T7 = 19; -+ public static final int T8 = 20; -+ public static final int RX = 21; -+ public static final int FP = 22; -+ public static final int S0 = 23; -+ public static final int S1 = 24; -+ public static final int S2 = 25; -+ public static final int S3 = 26; -+ public static final int S4 = 27; -+ public static final int S5 = 28; -+ public static final int S6 = 29; -+ public static final int S7 = 30; -+ public static final int S8 = 31; -+ public static final int PC = 32; -+ public static final int NPRGREG = 33; -+ -+ private static final String[] regNames = { -+ "ZERO", "RA", "TP", "SP", -+ "A0", "A1", "A2", "A3", -+ "A4", "A5", "A6", "A7", -+ "T0", "T1", "T2", "T3", -+ "T4", "T5", "T6", "T7", -+ "T8", "RX", "FP", "S0", -+ "S1", "S2", "S3", "S4", -+ "S5", "S6", "S7", "S8", -+ "PC" -+ }; -+ -+ private long[] data; -+ -+ public LOONGARCH64ThreadContext() { -+ data = new long[NPRGREG]; -+ } -+ -+ public int getNumRegisters() { -+ return NPRGREG; -+ } -+ -+ public String getRegisterName(int index) { -+ return regNames[index]; -+ } -+ -+ public void setRegister(int index, long value) { -+ data[index] = value; -+ } -+ -+ public long getRegister(int index) { -+ return data[index]; -+ } -+ -+ public CFrame getTopFrame(Debugger dbg) { -+ return null; -+ } -+ -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public abstract void setRegisterAsAddress(int index, Address value); -+ -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public abstract Address getRegisterAsAddress(int index); -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/MachineDescriptionLOONGARCH64.java 2024-02-20 10:42:37.652195606 +0800 -@@ -0,0 +1,41 @@ -+/* -+ * Copyright (c) 2000, 2008, Oracle and/or its affiliates. All rights reserved. -+ * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+package sun.jvm.hotspot.debugger; ++package sun.jvm.hotspot.debugger.loongarch64; + -+public class MachineDescriptionLOONGARCH64 extends MachineDescriptionTwosComplement implements MachineDescription { -+ public long getAddressSize() { -+ return 8; ++import java.lang.annotation.Native; ++ ++import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.cdbg.*; ++ ++/** Specifies the thread context on loongarch64 platforms; only a sub-portion ++ of the context is guaranteed to be present on all operating ++ systems. */ ++ ++public abstract class LOONGARCH64ThreadContext implements ThreadContext { ++ ++ // NOTE: the indices for the various registers must be maintained as ++ // listed across various operating systems. However, only a small ++ // subset of the registers' values are guaranteed to be present (and ++ // must be present for the SA's stack walking to work): EAX, EBX, ++ // ECX, EDX, ESI, EDI, EBP, ESP, and EIP. ++ ++ // One instance of the Native annotation is enough to trigger header generation ++ // for this file. ++ @Native ++ public static final int ZERO = 0; ++ public static final int RA = 1; ++ public static final int TP = 2; ++ public static final int SP = 3; ++ public static final int A0 = 4; ++ public static final int A1 = 5; ++ public static final int A2 = 6; ++ public static final int A3 = 7; ++ public static final int A4 = 8; ++ public static final int A5 = 9; ++ public static final int A6 = 10; ++ public static final int A7 = 11; ++ public static final int T0 = 12; ++ public static final int T1 = 13; ++ public static final int T2 = 14; ++ public static final int T3 = 15; ++ public static final int T4 = 16; ++ public static final int T5 = 17; ++ public static final int T6 = 18; ++ public static final int T7 = 19; ++ public static final int T8 = 20; ++ public static final int RX = 21; ++ public static final int FP = 22; ++ public static final int S0 = 23; ++ public static final int S1 = 24; ++ public static final int S2 = 25; ++ public static final int S3 = 26; ++ public static final int S4 = 27; ++ public static final int S5 = 28; ++ public static final int S6 = 29; ++ public static final int S7 = 30; ++ public static final int S8 = 31; ++ public static final int PC = 32; ++ public static final int NPRGREG = 33; ++ ++ private static final String[] regNames = { ++ "ZERO", "RA", "TP", "SP", ++ "A0", "A1", "A2", "A3", ++ "A4", "A5", "A6", "A7", ++ "T0", "T1", "T2", "T3", ++ "T4", "T5", "T6", "T7", ++ "T8", "RX", "FP", "S0", ++ "S1", "S2", "S3", "S4", ++ "S5", "S6", "S7", "S8", ++ "PC" ++ }; ++ ++ private long[] data; ++ ++ public LOONGARCH64ThreadContext() { ++ data = new long[NPRGREG]; ++ } ++ ++ public int getNumRegisters() { ++ return NPRGREG; + } + ++ public String getRegisterName(int index) { ++ return regNames[index]; ++ } + -+ public boolean isBigEndian() { -+ return false; ++ public void setRegister(int index, long value) { ++ data[index] = value; + } + -+ public boolean isLP64() { -+ return true; ++ public long getRegister(int index) { ++ return data[index]; ++ } ++ ++ public CFrame getTopFrame(Debugger dbg) { ++ return null; + } ++ ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public abstract void setRegisterAsAddress(int index, Address value); ++ ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public abstract Address getRegisterAsAddress(int index); +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java 2024-02-20 10:42:37.658862267 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java +index 7113a3a497b..de47531db7c 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/posix/elf/ELFHeader.java @@ -22,6 +22,12 @@ * */ @@ -75329,7 +75791,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package sun.jvm.hotspot.debugger.posix.elf; import java.io.FileInputStream; -@@ -63,6 +69,8 @@ +@@ -63,6 +69,8 @@ public interface ELFHeader { public static final int ARCH_i860 = 7; /** MIPS architecture type. */ public static final int ARCH_MIPS = 8; @@ -75338,10 +75800,48 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j /** Returns a file type which is defined by the file type constants. */ public short getFileType(); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java 2024-02-20 10:42:37.658862267 +0800 -@@ -0,0 +1,51 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +index d4a7c17dc85..1b3e5d5e971 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java +@@ -22,6 +22,12 @@ + * + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package sun.jvm.hotspot.debugger.remote; + + import java.rmi.*; +@@ -33,6 +39,7 @@ import sun.jvm.hotspot.debugger.cdbg.*; + import sun.jvm.hotspot.debugger.remote.x86.*; + import sun.jvm.hotspot.debugger.remote.amd64.*; + import sun.jvm.hotspot.debugger.remote.ppc64.*; ++import sun.jvm.hotspot.debugger.remote.loongarch64.*; + + /** An implementation of Debugger which wraps a + RemoteDebugger, providing remote debugging via RMI. +@@ -61,6 +68,10 @@ public class RemoteDebuggerClient extends DebuggerBase implements JVMDebugger { + threadFactory = new RemoteAMD64ThreadFactory(this); + } else if (cpu.equals("ppc64")) { + threadFactory = new RemotePPC64ThreadFactory(this); ++ } else if (cpu.equals("loongarch64")) { ++ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); ++ cachePageSize = 4096; ++ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); + } else { + try { + Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +new file mode 100644 +index 00000000000..242dd279e1a +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java +@@ -0,0 +1,54 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. @@ -75372,31 +75872,36 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j +import sun.jvm.hotspot.debugger.*; +import sun.jvm.hotspot.debugger.loongarch64.*; +import sun.jvm.hotspot.debugger.remote.*; ++import sun.jvm.hotspot.utilities.*; + -+public class RemoteLOONGARCH64ThreadContext extends LOONGARCH64ThreadContext { -+ private RemoteDebuggerClient debugger; -+ -+ public RemoteLOONGARCH64ThreadContext(RemoteDebuggerClient debugger) { -+ super(); -+ this.debugger = debugger; ++public class RemoteLOONGARCH64Thread extends RemoteThread { ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { ++ super(debugger, addr); + } + -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public void setRegisterAsAddress(int index, Address value) { -+ setRegister(index, debugger.getAddressValue(value)); ++ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { ++ super(debugger, id); + } + -+ /** This can't be implemented in this class since we would have to -+ tie the implementation to, for example, the debugging system */ -+ public Address getRegisterAsAddress(int index) { -+ return debugger.newAddress(getRegister(index)); ++ public ThreadContext getContext() throws IllegalThreadStateException { ++ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); ++ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : ++ debugger.getThreadIntegerRegisterSet(id); ++ if (Assert.ASSERTS_ENABLED) { ++ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); ++ } ++ for (int i = 0; i < regs.length; i++) { ++ context.setRegister(i, regs[i]); ++ } ++ return context; + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java 2024-02-20 10:42:37.658862267 +0800 -@@ -0,0 +1,45 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +new file mode 100644 +index 00000000000..634d5ad049f +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadContext.java +@@ -0,0 +1,51 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. @@ -75425,27 +75930,35 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j +package sun.jvm.hotspot.debugger.remote.loongarch64; + +import sun.jvm.hotspot.debugger.*; ++import sun.jvm.hotspot.debugger.loongarch64.*; +import sun.jvm.hotspot.debugger.remote.*; + -+public class RemoteLOONGARCH64ThreadFactory implements RemoteThreadFactory { ++public class RemoteLOONGARCH64ThreadContext extends LOONGARCH64ThreadContext { + private RemoteDebuggerClient debugger; + -+ public RemoteLOONGARCH64ThreadFactory(RemoteDebuggerClient debugger) { ++ public RemoteLOONGARCH64ThreadContext(RemoteDebuggerClient debugger) { ++ super(); + this.debugger = debugger; + } + -+ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { -+ return new RemoteLOONGARCH64Thread(debugger, threadIdentifierAddr); ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public void setRegisterAsAddress(int index, Address value) { ++ setRegister(index, debugger.getAddressValue(value)); + } + -+ public ThreadProxy createThreadWrapper(long id) { -+ return new RemoteLOONGARCH64Thread(debugger, id); ++ /** This can't be implemented in this class since we would have to ++ tie the implementation to, for example, the debugging system */ ++ public Address getRegisterAsAddress(int index) { ++ return debugger.newAddress(getRegister(index)); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64Thread.java 2024-02-20 10:42:37.658862267 +0800 -@@ -0,0 +1,54 @@ +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +new file mode 100644 +index 00000000000..4fb9cc7c069 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/loongarch64/RemoteLOONGARCH64ThreadFactory.java +@@ -0,0 +1,45 @@ +/* + * Copyright (c) 2002, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, 2021, Loongson Technology. All rights reserved. @@ -75474,35 +75987,27 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j +package sun.jvm.hotspot.debugger.remote.loongarch64; + +import sun.jvm.hotspot.debugger.*; -+import sun.jvm.hotspot.debugger.loongarch64.*; +import sun.jvm.hotspot.debugger.remote.*; -+import sun.jvm.hotspot.utilities.*; + -+public class RemoteLOONGARCH64Thread extends RemoteThread { -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, Address addr) { -+ super(debugger, addr); ++public class RemoteLOONGARCH64ThreadFactory implements RemoteThreadFactory { ++ private RemoteDebuggerClient debugger; ++ ++ public RemoteLOONGARCH64ThreadFactory(RemoteDebuggerClient debugger) { ++ this.debugger = debugger; + } + -+ public RemoteLOONGARCH64Thread(RemoteDebuggerClient debugger, long id) { -+ super(debugger, id); ++ public ThreadProxy createThreadWrapper(Address threadIdentifierAddr) { ++ return new RemoteLOONGARCH64Thread(debugger, threadIdentifierAddr); + } + -+ public ThreadContext getContext() throws IllegalThreadStateException { -+ RemoteLOONGARCH64ThreadContext context = new RemoteLOONGARCH64ThreadContext(debugger); -+ long[] regs = (addr != null)? debugger.getThreadIntegerRegisterSet(addr) : -+ debugger.getThreadIntegerRegisterSet(id); -+ if (Assert.ASSERTS_ENABLED) { -+ Assert.that(regs.length == LOONGARCH64ThreadContext.NPRGREG, "size of register set must match"); -+ } -+ for (int i = 0; i < regs.length; i++) { -+ context.setRegister(i, regs[i]); -+ } -+ return context; ++ public ThreadProxy createThreadWrapper(long id) { ++ return new RemoteLOONGARCH64Thread(debugger, id); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/debugger/remote/RemoteDebuggerClient.java 2024-02-20 10:42:37.658862267 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java +index a6f5da88ad4..2a220f9fd8b 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java @@ -22,6 +22,12 @@ * */ @@ -75513,64 +76018,31 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + * available on the same license terms set forth above. + */ + - package sun.jvm.hotspot.debugger.remote; - - import java.rmi.*; -@@ -33,6 +39,7 @@ - import sun.jvm.hotspot.debugger.remote.x86.*; - import sun.jvm.hotspot.debugger.remote.amd64.*; - import sun.jvm.hotspot.debugger.remote.ppc64.*; -+import sun.jvm.hotspot.debugger.remote.loongarch64.*; - - /** An implementation of Debugger which wraps a - RemoteDebugger, providing remote debugging via RMI. -@@ -61,6 +68,10 @@ - threadFactory = new RemoteAMD64ThreadFactory(this); - } else if (cpu.equals("ppc64")) { - threadFactory = new RemotePPC64ThreadFactory(this); -+ } else if (cpu.equals("loongarch64")) { -+ threadFactory = new RemoteLOONGARCH64ThreadFactory(this); -+ cachePageSize = 4096; -+ cacheNumPages = parseCacheNumPagesProperty(cacheSize / cachePageSize); - } else { - try { - Class tf = Class.forName("sun.jvm.hotspot.debugger.remote." + -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/HotSpotAgent.java 2024-02-20 10:42:37.645528945 +0800 -@@ -23,6 +23,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2018, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ * -+ */ - package sun.jvm.hotspot; + package sun.jvm.hotspot.runtime; - import java.rmi.RemoteException; -@@ -38,6 +44,7 @@ - import sun.jvm.hotspot.debugger.MachineDescriptionAArch64; - import sun.jvm.hotspot.debugger.MachineDescriptionRISCV64; - import sun.jvm.hotspot.debugger.MachineDescriptionIntelX86; -+import sun.jvm.hotspot.debugger.MachineDescriptionLOONGARCH64; - import sun.jvm.hotspot.debugger.NoSuchSymbolException; - import sun.jvm.hotspot.debugger.bsd.BsdDebuggerLocal; - import sun.jvm.hotspot.debugger.linux.LinuxDebuggerLocal; -@@ -557,6 +564,8 @@ - machDesc = new MachineDescriptionAArch64(); - } else if (cpu.equals("riscv64")) { - machDesc = new MachineDescriptionRISCV64(); -+ } else if (cpu.equals("loongarch64")) { -+ machDesc = new MachineDescriptionLOONGARCH64(); - } else { - try { - machDesc = (MachineDescription) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java 2024-02-20 10:42:37.678862251 +0800 + import java.util.*; +@@ -36,6 +42,7 @@ import sun.jvm.hotspot.runtime.linux_amd64.LinuxAMD64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_riscv64.LinuxRISCV64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; ++import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; + import sun.jvm.hotspot.runtime.bsd_aarch64.BsdAARCH64JavaThreadPDAccess; +@@ -116,6 +123,8 @@ public class Threads { + access = new LinuxAARCH64JavaThreadPDAccess(); + } else if (cpu.equals("riscv64")) { + access = new LinuxRISCV64JavaThreadPDAccess(); ++ } else if (cpu.equals("loongarch64")) { ++ access = new LinuxLOONGARCH64JavaThreadPDAccess(); + } else { + try { + access = (JavaThreadPDAccess) +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java +new file mode 100644 +index 00000000000..b92c8eca74b +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/linux_loongarch64/LinuxLOONGARCH64JavaThreadPDAccess.java @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved. @@ -75711,9 +76183,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return debugger.getThreadForIdentifierAddress(threadIdAddr); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java 2024-02-20 10:42:37.678862251 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java +new file mode 100644 +index 00000000000..824270e1329 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64CurrentFrameGuess.java @@ -0,0 +1,250 @@ +/* + * Copyright (c) 2001, 2006, Oracle and/or its affiliates. All rights reserved. @@ -75965,9 +76439,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + pcFound = pc; + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java 2024-02-20 10:42:37.678862251 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java +new file mode 100644 +index 00000000000..9470781c48e +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64Frame.java @@ -0,0 +1,540 @@ +/* + * Copyright (c) 2001, 2015, Oracle and/or its affiliates. All rights reserved. @@ -76509,9 +76985,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java 2024-02-20 10:42:37.678862251 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java +new file mode 100644 +index 00000000000..0ad9573a42d +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64JavaCallWrapper.java @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2001, 2002, Oracle and/or its affiliates. All rights reserved. @@ -76572,9 +77050,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return lastJavaFPField.getValue(addr.addOffsetTo(anchorField.getOffset())); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java 2024-02-20 10:42:37.678862251 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java +new file mode 100644 +index 00000000000..2cf904d3885 +--- /dev/null ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/loongarch64/LOONGARCH64RegisterMap.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2001, 2012, Oracle and/or its affiliates. All rights reserved. @@ -76628,42 +77108,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + protected void initializeFromPD(RegisterMap map) {} + protected Address getLocationPD(VMReg reg) { return null; } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/runtime/Threads.java 2024-02-20 10:42:37.678862251 +0800 -@@ -22,6 +22,12 @@ - * - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2019, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package sun.jvm.hotspot.runtime; - - import java.util.*; -@@ -36,6 +42,7 @@ - import sun.jvm.hotspot.runtime.linux_aarch64.LinuxAARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_riscv64.LinuxRISCV64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.linux_ppc64.LinuxPPC64JavaThreadPDAccess; -+import sun.jvm.hotspot.runtime.linux_loongarch64.LinuxLOONGARCH64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_x86.BsdX86JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_amd64.BsdAMD64JavaThreadPDAccess; - import sun.jvm.hotspot.runtime.bsd_aarch64.BsdAARCH64JavaThreadPDAccess; -@@ -116,6 +123,8 @@ - access = new LinuxAARCH64JavaThreadPDAccess(); - } else if (cpu.equals("riscv64")) { - access = new LinuxRISCV64JavaThreadPDAccess(); -+ } else if (cpu.equals("loongarch64")) { -+ access = new LinuxLOONGARCH64JavaThreadPDAccess(); - } else { - try { - access = (JavaThreadPDAccess) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ---- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java 2024-02-20 10:42:37.688862243 +0800 +diff --git a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java +index f4cd4873207..622ddb7349e 100644 +--- a/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java ++++ b/src/jdk.hotspot.agent/share/classes/sun/jvm/hotspot/utilities/PlatformInfo.java @@ -22,6 +22,13 @@ * */ @@ -76678,7 +77126,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j package sun.jvm.hotspot.utilities; /** Provides canonicalized OS and CPU information for the rest of the -@@ -50,7 +57,7 @@ +@@ -50,7 +57,7 @@ public class PlatformInfo { public static boolean knownCPU(String cpu) { final String[] KNOWN = @@ -76687,7 +77135,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j for(String s : KNOWN) { if(s.equals(cpu)) -@@ -83,6 +90,9 @@ +@@ -83,6 +90,9 @@ public class PlatformInfo { if (cpu.equals("ppc64le")) return "ppc64"; @@ -76697,9 +77145,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j return cpu; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java +new file mode 100644 +index 00000000000..1f54e9f3c59 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotJVMCIBackendFactory.java @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -76843,9 +77293,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return new JVMCIBackend(metaAccess, codeCache, constantReflection, stackIntrospection); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java +new file mode 100644 +index 00000000000..e1a007000d2 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotRegisterConfig.java @@ -0,0 +1,297 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77144,9 +77596,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + return String.format("Allocatable: " + getAllocatableRegisters() + "%n" + "CallerSave: " + getCallerSaveRegisters() + "%n"); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java +new file mode 100644 +index 00000000000..67173ecab48 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/LoongArch64HotSpotVMConfig.java @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77227,9 +77681,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + final long loongarch64UAL = getConstant("VM_Version::CPU_UAL", Long.class); + // Checkstyle: resume +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java +new file mode 100644 +index 00000000000..74c6ca9801f +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/hotspot/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77259,9 +77715,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + * The LoongArch64 HotSpot specific portions of the JVMCI API. + */ +package jdk.vm.ci.hotspot.loongarch64; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java +new file mode 100644 +index 00000000000..c178ec21529 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64.java @@ -0,0 +1,251 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77514,9 +77972,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java +new file mode 100644 +index 00000000000..047a1dbbe36 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/LoongArch64Kind.java @@ -0,0 +1,163 @@ +/* + * Copyright (c) 2015, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77681,9 +78141,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java ---- a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java 2024-02-20 10:42:37.782195505 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java +new file mode 100644 +index 00000000000..6df1b7b3a92 +--- /dev/null ++++ b/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/loongarch64/package-info.java @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved. @@ -77713,9 +78175,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j + * The LoongArch64 platform independent portions of the JVMCI API. + */ +package jdk.vm.ci.loongarch64; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/jdk.internal.vm.ci/share/classes/module-info.java b/src/jdk.internal.vm.ci/share/classes/module-info.java ---- a/src/jdk.internal.vm.ci/share/classes/module-info.java 2024-01-17 09:43:21.000000000 +0800 -+++ b/src/jdk.internal.vm.ci/share/classes/module-info.java 2024-02-20 10:42:37.785528835 +0800 +diff --git a/src/jdk.internal.vm.ci/share/classes/module-info.java b/src/jdk.internal.vm.ci/share/classes/module-info.java +index b4b93f6a747..68fa668e1bc 100644 +--- a/src/jdk.internal.vm.ci/share/classes/module-info.java ++++ b/src/jdk.internal.vm.ci/share/classes/module-info.java @@ -23,6 +23,12 @@ * questions. */ @@ -77729,16 +78192,17 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/j module jdk.internal.vm.ci { exports jdk.vm.ci.services to jdk.internal.vm.compiler, -@@ -40,5 +46,6 @@ +@@ -40,5 +46,6 @@ module jdk.internal.vm.ci { provides jdk.vm.ci.hotspot.HotSpotJVMCIBackendFactory with jdk.vm.ci.hotspot.aarch64.AArch64HotSpotJVMCIBackendFactory, jdk.vm.ci.hotspot.amd64.AMD64HotSpotJVMCIBackendFactory, + jdk.vm.ci.hotspot.loongarch64.LoongArch64HotSpotJVMCIBackendFactory, jdk.vm.ci.hotspot.riscv64.RISCV64HotSpotJVMCIBackendFactory; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/utils/hsdis/binutils/hsdis-binutils.c b/src/utils/hsdis/binutils/hsdis-binutils.c ---- a/src/utils/hsdis/binutils/hsdis-binutils.c 2024-01-17 09:43:22.000000000 +0800 -+++ b/src/utils/hsdis/binutils/hsdis-binutils.c 2024-02-20 10:42:37.985528676 +0800 +diff --git a/src/utils/hsdis/binutils/hsdis-binutils.c b/src/utils/hsdis/binutils/hsdis-binutils.c +index 279ed53ba5d..3281346aa23 100644 +--- a/src/utils/hsdis/binutils/hsdis-binutils.c ++++ b/src/utils/hsdis/binutils/hsdis-binutils.c @@ -44,6 +44,12 @@ * */ @@ -77752,34 +78216,31 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/src/u /* hsdis.c -- dump a range of addresses as native instructions This implements the plugin protocol required by the HotSpot PrintAssembly option. -@@ -501,6 +507,9 @@ +@@ -500,6 +506,9 @@ static const char* native_arch_name() { + #endif #ifdef LIBARCH_riscv64 res = "riscv:rv64"; - #endif ++#endif +#ifdef LIBARCH_loongarch64 + res = "loongarch64"; -+#endif + #endif if (res == NULL) res = "architecture not set in Makefile!"; - return res; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/.src-rev b/.src-rev ---- a/.src-rev 2024-01-17 09:43:33.000000000 +0800 -+++ b/.src-rev 1970-01-01 08:00:00.000000000 +0800 -@@ -1 +0,0 @@ --.:git:375769c69868 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java b/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java ---- a/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java 2024-02-20 10:42:38.005528660 +0800 -@@ -23,11 +23,17 @@ +diff --git a/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java b/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java +index 465999eac7f..ba9629d5e77 100644 +--- a/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java ++++ b/test/hotspot/jtreg/compiler/arguments/TestCodeEntryAlignment.java +@@ -22,12 +22,18 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023, These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @library /test/lib / * @bug 8281467 @@ -77789,9 +78250,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * * @summary Test large CodeEntryAlignments are accepted * @run driver compiler.arguments.TestCodeEntryAlignment -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java b/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java ---- a/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java 2024-02-20 10:42:38.008861992 +0800 +diff --git a/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java b/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java +index 55dfb0460a2..5f36747a394 100644 +--- a/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java ++++ b/test/hotspot/jtreg/compiler/arraycopy/stress/TestStressArrayCopy.java @@ -21,6 +21,12 @@ * questions. */ @@ -77805,7 +78267,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.arraycopy.stress; import java.util.ArrayList; -@@ -149,6 +155,14 @@ +@@ -149,6 +155,14 @@ public class TestStressArrayCopy { // Alternate configs with other flags configs = alternate(configs, "UseCompressedOops"); configs = alternate(configs, "UseSIMDForMemoryOps"); @@ -77820,9 +78282,36 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ } else { // Generic config. configs.add(new ArrayList()); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java b/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java ---- a/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java 2024-02-20 10:42:38.025528645 +0800 +diff --git a/test/hotspot/jtreg/compiler/c2/TestBit.java b/test/hotspot/jtreg/compiler/c2/TestBit.java +index a3c9421a3f9..aa02e31f712 100644 +--- a/test/hotspot/jtreg/compiler/c2/TestBit.java ++++ b/test/hotspot/jtreg/compiler/c2/TestBit.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package compiler.c2; + + import jdk.test.lib.process.OutputAnalyzer; +@@ -33,7 +39,7 @@ import jdk.test.lib.process.ProcessTools; + * @library /test/lib / + * + * @requires vm.flagless +- * @requires os.arch=="aarch64" | os.arch=="amd64" | os.arch == "ppc64le" | os.arch == "riscv64" ++ * @requires os.arch=="aarch64" | os.arch=="amd64" | os.arch == "ppc64le" | os.arch == "riscv64" | os.arch=="loongarch64" + * @requires vm.debug == true & vm.compiler2.enabled + * + * @run driver compiler.c2.TestBit +diff --git a/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java b/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java +index f5b37f229d0..a0eddb2ef1f 100644 +--- a/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java ++++ b/test/hotspot/jtreg/compiler/c2/irTests/CmpUWithZero.java @@ -21,6 +21,12 @@ * questions. */ @@ -77836,7 +78325,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.c2.irTests; import compiler.lib.ir_framework.*; -@@ -29,7 +35,7 @@ +@@ -29,7 +35,7 @@ import compiler.lib.ir_framework.*; * @test * bug 8290529 * @summary verify that x 1) & +- * os.arch=="aarch64" & vm.cpu.features ~= ".*svebitperm.*")) ++ * os.arch=="aarch64" & vm.cpu.features ~= ".*svebitperm.*") | ++ * os.arch=="loongarch64") + * @library /test/lib / + * @run driver compiler.intrinsics.TestBitShuffleOpers + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java b/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java +index 6d1943ca145..1d80230aa42 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java +@@ -20,6 +20,13 @@ + * or visit www.oracle.com if you need additional information or have any + * questions. + */ ++ ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package compiler.intrinsics; + + import compiler.lib.ir_framework.*; +@@ -30,7 +37,7 @@ import jdk.test.lib.Utils; + * @test + * @key randomness + * @bug 8283726 8287925 +- * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="aarch64" ++ * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="aarch64" | os.arch=="loongarch64" + * @summary Test the intrinsics implementation of Integer/Long::compareUnsigned + * @library /test/lib / + * @run driver compiler.intrinsics.TestCompareUnsigned +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java +index ab06e07a482..a6ca357dc92 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java +@@ -22,10 +22,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test intrinsic for Double.isFinite. +-* @requires os.arch == "riscv64" ++* @requires os.arch == "riscv64" | os.arch == "loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestDoubleIsFinite + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java +index b35b6cda3d2..630566360ac 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java +@@ -22,10 +22,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test intrinsic for Double.isInfinite. +-* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" ++* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" | os.arch == "loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestDoubleIsInfinite + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java +index 7fb0bebc516..e61f2febfcf 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java +@@ -22,10 +22,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test intrinsics for Float.isFinite. +-* @requires os.arch == "riscv64" ++* @requires os.arch == "riscv64" | os.arch == "loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestFloatIsFinite + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java +index 54fa7657851..ec35129aae8 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java +@@ -22,10 +22,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022. These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test intrinsics for Float.isInfinite. +-* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" ++* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" | os.arch == "loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestFloatIsInfinite + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java b/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java +index 1b214c32391..5f997a72c4a 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test x86_64 intrinsic for divideUnsigned() and remainderUnsigned() methods for Integer +-* @requires os.arch=="amd64" | os.arch=="x86_64" ++* @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestIntegerUnsignedDivMod + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java b/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java +index ee9c6499902..32b1d54a3e3 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @summary Test x86_64 intrinsic for divideUnsigned() and remainderUnsigned() methods for Long +-* @requires os.arch=="amd64" | os.arch=="x86_64" ++* @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="loongarch64" + * @library /test/lib / + * @run driver compiler.intrinsics.TestLongUnsignedDivMod + */ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/chacha/TestChaCha20.java b/test/hotspot/jtreg/compiler/intrinsics/chacha/TestChaCha20.java +index c2275f6563e..b94e05fc1ff 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/chacha/TestChaCha20.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/chacha/TestChaCha20.java @@ -22,6 +22,12 @@ * questions. */ @@ -78057,7 +78717,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.intrinsics.chacha; import java.util.ArrayList; -@@ -97,6 +103,12 @@ +@@ -97,6 +103,12 @@ public class TestChaCha20 { System.out.println("Setting up ASIMD worker"); configs.add(new ArrayList()); } @@ -78070,19 +78730,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ } else { // We only have ChaCha20 intrinsics on x64 and aarch64 // currently. If the platform is neither of these then -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java ---- a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java 2024-02-20 10:42:38.055528622 +0800 -@@ -22,10 +22,16 @@ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java +index eeba614de4f..5a2f293e259 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16Conversion.java +@@ -21,11 +21,17 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023. These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8289551 8302976 * @summary Verify conversion between float and the binary16 format @@ -78091,19 +78753,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.compiler1.enabled & vm.compiler2.enabled * @requires vm.compMode != "Xcomp" * @comment default run -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java ---- a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java 2024-02-20 10:42:38.055528622 +0800 -@@ -22,10 +22,16 @@ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java +index 38060dfb504..151caa94346 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/float16/Binary16ConversionNaN.java +@@ -21,11 +21,17 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023. These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8289551 8302976 * @summary Verify NaN sign and significand bits are preserved across conversions @@ -78112,19 +78776,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.compiler1.enabled & vm.compiler2.enabled * @requires vm.compMode != "Xcomp" * @library /test/lib / -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java b/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java ---- a/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java 2024-02-20 10:42:38.055528622 +0800 -@@ -22,10 +22,16 @@ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java b/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java +index 4afda120709..230aef2fb58 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/float16/TestAllFloat16ToFloat.java +@@ -21,11 +21,17 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023. These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8302976 * @summary Verify conversion between float and the binary16 format @@ -78133,19 +78799,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.compiler1.enabled & vm.compiler2.enabled * @requires vm.compMode != "Xcomp" * @comment default run: -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java b/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java ---- a/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java 2024-02-20 10:42:38.055528622 +0800 -@@ -22,10 +22,16 @@ +diff --git a/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java b/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java +index 062e6804897..42a9d239e06 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/float16/TestConstFloat16ToFloat.java +@@ -21,11 +21,17 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023. These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8302976 * @summary Verify conversion cons between float and the binary16 format @@ -78154,9 +78822,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.compiler1.enabled & vm.compiler2.enabled * @requires vm.compMode != "Xcomp" * @comment default run: -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ---- a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java 2024-02-20 10:42:38.058861951 +0800 +diff --git a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java +index 468cd83d7a2..40d2b03e301 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/sha/cli/testcases/GenericTestCaseForOtherCPU.java @@ -21,6 +21,12 @@ * questions. */ @@ -78170,7 +78839,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.intrinsics.sha.cli.testcases; import compiler.intrinsics.sha.cli.DigestOptionsBase; -@@ -32,7 +38,7 @@ +@@ -32,7 +38,7 @@ import jdk.test.lib.cli.predicate.OrPredicate; /** * Generic test case for SHA-related options targeted to any CPU except @@ -78179,7 +78848,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ */ public class GenericTestCaseForOtherCPU extends DigestOptionsBase.TestCase { -@@ -44,14 +50,15 @@ +@@ -44,14 +50,15 @@ public class GenericTestCaseForOtherCPU extends } public GenericTestCaseForOtherCPU(String optionName, boolean checkUseSHA) { @@ -78197,9 +78866,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ this.checkUseSHA = checkUseSHA; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java b/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java ---- a/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java 2024-02-20 10:42:38.058861951 +0800 +diff --git a/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java b/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java +index afc308c37dd..5b949dfa19a 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/string/TestCountPositives.java @@ -21,13 +21,21 @@ * questions. */ @@ -78223,7 +78893,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * * @build java.base/java.lang.Helper * @run main compiler.intrinsics.string.TestCountPositives -@@ -91,7 +99,7 @@ +@@ -91,7 +99,7 @@ public class TestCountPositives { int calculated = Helper.StringCodingCountPositives(tBa, off, len); int expected = countPositives(tBa, off, len); if (calculated != expected) { @@ -78232,9 +78902,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ // allow intrinsics to return early with a lower value, // but only if we're not expecting the full length (no // negative bytes) -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java b/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java ---- a/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java 2024-02-20 10:42:38.058861951 +0800 +diff --git a/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java b/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java +index 26bc03c271b..606f0d4f17d 100644 +--- a/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java ++++ b/test/hotspot/jtreg/compiler/intrinsics/string/TestStringCompareToDifferentLength.java @@ -22,9 +22,15 @@ * questions. */ @@ -78252,187 +78923,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @summary String::compareTo implementation uses different algorithms for * different string length. This test creates string with specified * size and longer string, which is same at beginning. -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestBitShuffleOpers.java b/test/hotspot/jtreg/compiler/intrinsics/TestBitShuffleOpers.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestBitShuffleOpers.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestBitShuffleOpers.java 2024-02-20 10:42:38.052195290 +0800 -@@ -21,6 +21,12 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @bug 8283894 -@@ -31,7 +37,8 @@ - * (vm.cpu.features ~= ".*bmi2.*" & vm.cpu.features ~= ".*bmi1.*" & - * vm.cpu.features ~= ".*sse2.*")) | - * ((vm.opt.UseSVE == "null" | vm.opt.UseSVE > 1) & -- * os.arch=="aarch64" & vm.cpu.features ~= ".*svebitperm.*")) -+ * os.arch=="aarch64" & vm.cpu.features ~= ".*svebitperm.*") | -+ * os.arch=="loongarch64") - * @library /test/lib / - * @run driver compiler.intrinsics.TestBitShuffleOpers - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java b/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestCompareUnsigned.java 2024-02-20 10:42:38.052195290 +0800 -@@ -20,6 +20,13 @@ - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -+ -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package compiler.intrinsics; - - import compiler.lib.ir_framework.*; -@@ -30,7 +37,7 @@ - * @test - * @key randomness - * @bug 8283726 8287925 -- * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="aarch64" -+ * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="aarch64" | os.arch=="loongarch64" - * @summary Test the intrinsics implementation of Integer/Long::compareUnsigned - * @library /test/lib / - * @run driver compiler.intrinsics.TestCompareUnsigned -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsFinite.java 2024-02-20 10:42:38.052195290 +0800 -@@ -22,10 +22,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test intrinsic for Double.isFinite. --* @requires os.arch == "riscv64" -+* @requires os.arch == "riscv64" | os.arch == "loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestDoubleIsFinite - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestDoubleIsInfinite.java 2024-02-20 10:42:38.052195290 +0800 -@@ -22,10 +22,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test intrinsic for Double.isInfinite. --* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" -+* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" | os.arch == "loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestDoubleIsInfinite - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java 2024-02-20 10:42:38.052195290 +0800 -@@ -22,10 +22,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test intrinsics for Float.isFinite. --* @requires os.arch == "riscv64" -+* @requires os.arch == "riscv64" | os.arch == "loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestFloatIsFinite - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestFloatIsInfinite.java 2024-02-20 10:42:38.052195290 +0800 -@@ -22,10 +22,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022. These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test intrinsics for Float.isInfinite. --* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" -+* @requires vm.cpu.features ~= ".*avx512dq.*" | os.arch == "riscv64" | os.arch == "loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestFloatIsInfinite - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java b/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestIntegerUnsignedDivMod.java 2024-02-20 10:42:38.052195290 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test x86_64 intrinsic for divideUnsigned() and remainderUnsigned() methods for Integer --* @requires os.arch=="amd64" | os.arch=="x86_64" -+* @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestIntegerUnsignedDivMod - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java b/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java ---- a/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/intrinsics/TestLongUnsignedDivMod.java 2024-02-20 10:42:38.052195290 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Test x86_64 intrinsic for divideUnsigned() and remainderUnsigned() methods for Long --* @requires os.arch=="amd64" | os.arch=="x86_64" -+* @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="loongarch64" - * @library /test/lib / - * @run driver compiler.intrinsics.TestLongUnsignedDivMod - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java 2024-02-20 10:42:38.068861944 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java +index 7483c45a654..68c280f1f39 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/CodeInstallationTest.java @@ -20,10 +20,18 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -78452,7 +78946,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ import jdk.vm.ci.riscv64.RISCV64; import jdk.vm.ci.code.Architecture; import jdk.vm.ci.code.CodeCacheProvider; -@@ -31,6 +39,7 @@ +@@ -31,6 +39,7 @@ import jdk.vm.ci.code.InstalledCode; import jdk.vm.ci.code.TargetDescription; import jdk.vm.ci.code.test.aarch64.AArch64TestAssembler; import jdk.vm.ci.code.test.amd64.AMD64TestAssembler; @@ -78460,7 +78954,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ import jdk.vm.ci.code.test.riscv64.RISCV64TestAssembler; import jdk.vm.ci.hotspot.HotSpotCodeCacheProvider; import jdk.vm.ci.hotspot.HotSpotCompiledCode; -@@ -80,6 +89,8 @@ +@@ -80,6 +89,8 @@ public class CodeInstallationTest { return new AArch64TestAssembler(codeCache, config); } else if (arch instanceof RISCV64) { return new RISCV64TestAssembler(codeCache, config); @@ -78469,9 +78963,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ } else { Assert.fail("unsupported architecture"); return null; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java 2024-02-20 10:42:38.068861944 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java +index adbad3e0b4d..e1ce622af2b 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/DataPatchTest.java @@ -21,10 +21,16 @@ * questions. */ @@ -78502,9 +78997,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.DataPatchTest */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java 2024-02-20 10:42:38.068861944 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java +index 879e6f86058..fcf7c058232 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/InterpreterFrameSizeTest.java @@ -21,10 +21,16 @@ * questions. */ @@ -78535,9 +79031,181 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.InterpreterFrameSizeTest */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java 2024-02-20 10:42:38.068861944 +0800 +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +index 3d49a4f3575..8a0427d3da2 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -33,9 +39,10 @@ + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.riscv64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.MaxOopMapStackOffsetTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +index ebd57b6faaf..ed15dff3a5e 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" + * @library /test/lib / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.code +@@ -33,9 +39,10 @@ + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.common + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.riscv64 +- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java ++ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest + */ + package jdk.vm.ci.code.test; +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +index 80c63392b6e..f667c799773 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,9 +38,10 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.riscv64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleCodeInstallationTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java +index c7d8d2cf830..6c4b6506ee5 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,9 +38,10 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.riscv64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleDebugInfoTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java +index 543128e932c..4aa99f24060 100644 +--- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java +@@ -21,10 +21,16 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /** + * @test + * @requires vm.jvmci +- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" + * @library / + * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot + * jdk.internal.vm.ci/jdk.vm.ci.meta +@@ -32,9 +38,10 @@ + * jdk.internal.vm.ci/jdk.vm.ci.code.site + * jdk.internal.vm.ci/jdk.vm.ci.runtime + * jdk.internal.vm.ci/jdk.vm.ci.aarch64 ++ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 + * jdk.internal.vm.ci/jdk.vm.ci.amd64 + * jdk.internal.vm.ci/jdk.vm.ci.riscv64 +- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java ++ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java + * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.VirtualObjectDebugInfoTest + */ + +diff --git a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java +new file mode 100644 +index 00000000000..4c76868453a +--- /dev/null ++++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/loongarch64/LoongArch64TestAssembler.java @@ -0,0 +1,568 @@ +/* + * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved. @@ -79107,174 +79775,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/MaxOopMapStackOffsetTest.java 2024-02-20 10:42:38.068861944 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -33,9 +39,10 @@ - * jdk.internal.vm.ci/jdk.vm.ci.common - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.riscv64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.MaxOopMapStackOffsetTest - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/NativeCallTest.java 2024-02-20 10:42:38.068861944 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" - * @library /test/lib / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.code -@@ -33,9 +39,10 @@ - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.common - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.riscv64 -- * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java -+ * @compile CodeInstallationTest.java TestHotSpotVMConfig.java NativeCallTest.java TestAssembler.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm/native -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -Xbootclasspath/a:. jdk.vm.ci.code.test.NativeCallTest - */ - package jdk.vm.ci.code.test; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleCodeInstallationTest.java 2024-02-20 10:42:38.068861944 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,9 +38,10 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.riscv64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleCodeInstallationTest - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/SimpleDebugInfoTest.java 2024-02-20 10:42:38.068861944 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,9 +38,10 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.riscv64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.SimpleDebugInfoTest - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java ---- a/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/VirtualObjectDebugInfoTest.java 2024-02-20 10:42:38.068861944 +0800 -@@ -21,10 +21,16 @@ - * questions. - */ - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @requires vm.jvmci -- * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" -+ * @requires vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" - * @library / - * @modules jdk.internal.vm.ci/jdk.vm.ci.hotspot - * jdk.internal.vm.ci/jdk.vm.ci.meta -@@ -32,9 +38,10 @@ - * jdk.internal.vm.ci/jdk.vm.ci.code.site - * jdk.internal.vm.ci/jdk.vm.ci.runtime - * jdk.internal.vm.ci/jdk.vm.ci.aarch64 -+ * jdk.internal.vm.ci/jdk.vm.ci.loongarch64 - * jdk.internal.vm.ci/jdk.vm.ci.amd64 - * jdk.internal.vm.ci/jdk.vm.ci.riscv64 -- * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java -+ * @compile CodeInstallationTest.java DebugInfoTest.java TestAssembler.java TestHotSpotVMConfig.java amd64/AMD64TestAssembler.java aarch64/AArch64TestAssembler.java riscv64/RISCV64TestAssembler.java loongarch64/LoongArch64TestAssembler.java - * @run junit/othervm -XX:+UnlockExperimentalVMOptions -XX:+EnableJVMCI -XX:-UseJVMCICompiler jdk.vm.ci.code.test.VirtualObjectDebugInfoTest - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java ---- a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java 2024-02-20 10:42:38.075528605 +0800 +diff --git a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java +index a555249637b..85cb1cb639b 100644 +--- a/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java ++++ b/test/hotspot/jtreg/compiler/lib/ir_framework/IRNode.java @@ -21,6 +21,12 @@ * questions. */ @@ -79288,7 +79792,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.lib.ir_framework; import compiler.lib.ir_framework.driver.irmatching.mapping.*; -@@ -277,13 +283,13 @@ +@@ -375,13 +381,13 @@ public class IRNode { public static final String CHECKCAST_ARRAY = PREFIX + "CHECKCAST_ARRAY" + POSTFIX; static { @@ -79304,19 +79808,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ optoOnly(CHECKCAST_ARRAY_OF, regex); } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java b/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java ---- a/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java 2024-02-20 10:42:38.088861927 +0800 -@@ -22,11 +22,17 @@ +diff --git a/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java b/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java +index b1495d00548..61a9eacdf48 100644 +--- a/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java ++++ b/test/hotspot/jtreg/compiler/loopopts/superword/ReductionPerf.java +@@ -21,12 +21,18 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023, These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8074981 8302652 * @summary Test SuperWord Reduction Perf. @@ -79326,19 +79832,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run main/othervm -Xbatch -XX:LoopUnrollLimit=250 * -XX:CompileCommand=exclude,compiler.loopopts.superword.ReductionPerf::main -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java b/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java ---- a/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java 2024-02-20 10:42:38.095528589 +0800 -@@ -22,11 +22,17 @@ +diff --git a/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java b/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java +index 390a0dcdd3f..d7baa9bfb75 100644 +--- a/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java ++++ b/test/hotspot/jtreg/compiler/rangechecks/TestRangeCheckHoistingScaledIV.java +@@ -21,12 +21,18 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2023, These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8289996 * @summary Test range check hoisting for some scaled iv at array index @@ -79348,23 +79856,24 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @modules jdk.incubator.vector * @compile --enable-preview -source ${jdk.version} TestRangeCheckHoistingScaledIV.java * @run main/othervm --enable-preview compiler.rangechecks.TestRangeCheckHoistingScaledIV -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java ---- a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java 2024-02-20 10:42:38.098861920 +0800 -@@ -22,6 +22,12 @@ +diff --git a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java +index df221959bb5..a15ac48e3fa 100644 +--- a/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java ++++ b/test/hotspot/jtreg/compiler/runtime/TestConstantsInError.java +@@ -21,6 +21,12 @@ + * questions. */ - /* ++/* + * This file has been modified by Loongson Technology in 2022. These + * modifications are Copyright (c) 2022 Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 8279822 - * @requires vm.flagless -@@ -130,7 +136,7 @@ +@@ -130,7 +136,7 @@ public abstract class TestConstantsInError implements OutputProcessor { results.shouldMatch("Test_C1/.*::test \\(3 bytes\\)$") .shouldMatch("Test_C2/.*::test \\(3 bytes\\)$"); @@ -79373,7 +79882,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ results.shouldMatch("Test_C1/.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_C2/.*::test \\(3 bytes\\) made not entrant"); } else { -@@ -168,7 +174,7 @@ +@@ -168,7 +174,7 @@ public abstract class TestConstantsInError implements OutputProcessor { .shouldMatch("Test_MH3/.*::test \\(3 bytes\\)$") .shouldMatch("Test_MH4/.*::test \\(3 bytes\\)$"); @@ -79382,7 +79891,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ results.shouldMatch("Test_MH1/.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_MH2/.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_MH3/.*::test \\(3 bytes\\) made not entrant") -@@ -191,7 +197,7 @@ +@@ -191,7 +197,7 @@ public abstract class TestConstantsInError implements OutputProcessor { results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\)$") .shouldMatch("Test_MT2/.*::test \\(3 bytes\\)$"); @@ -79391,7 +79900,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ results.shouldMatch("Test_MT1/.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_MT2/.*::test \\(3 bytes\\) made not entrant"); } else { -@@ -235,7 +241,7 @@ +@@ -235,7 +241,7 @@ public abstract class TestConstantsInError implements OutputProcessor { .shouldMatch("Test_CD3.*::test \\(3 bytes\\)$") .shouldMatch("Test_CD4.*::test \\(3 bytes\\)$"); @@ -79400,10 +79909,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ results.shouldMatch("Test_CD1.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_CD2.*::test \\(3 bytes\\) made not entrant") .shouldMatch("Test_CD3.*::test \\(3 bytes\\) made not entrant") -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java b/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java ---- a/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java 2024-02-20 10:42:38.098861920 +0800 -@@ -22,13 +22,19 @@ +diff --git a/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java b/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java +index 682198672f7..c62956d467f 100644 +--- a/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java ++++ b/test/hotspot/jtreg/compiler/sharedstubs/SharedStubToInterpTest.java +@@ -22,6 +22,12 @@ * */ @@ -79414,19 +79924,21 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + */ + /** - * @test SharedStubToInterpTest - * @summary Checks that stubs to the interpreter can be shared for static or final method. + * @test id=C1 * @bug 8280481 - * @library /test/lib +@@ -34,7 +40,7 @@ * -- * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="i386" | os.arch=="x86" | os.arch=="aarch64" | os.arch=="riscv64" -+ * @requires os.arch=="amd64" | os.arch=="x86_64" | os.arch=="i386" | os.arch=="x86" | os.arch=="aarch64" | os.arch=="riscv64" | os.arch=="loongarch64" + * @test id=C2 + * @requires vm.opt.TieredStopAtLevel == null & vm.opt.TieredCompilation == null +- * @requires vm.simpleArch == "x86" | vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" ++ * @requires vm.simpleArch == "x86" | vm.simpleArch == "x64" | vm.simpleArch == "aarch64" | vm.simpleArch == "riscv64" | vm.simpleArch == "loongarch64" * @requires vm.debug + * @run driver compiler.sharedstubs.SharedStubToInterpTest -XX:-TieredCompilation * - * @run driver compiler.sharedstubs.SharedStubToInterpTest -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ---- a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java 2024-02-20 10:42:38.102195252 +0800 +diff --git a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java +index 689c7c8cc2f..f734c1baa3f 100644 +--- a/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java ++++ b/test/hotspot/jtreg/compiler/testlibrary/sha/predicate/IntrinsicPredicates.java @@ -21,6 +21,12 @@ * questions. */ @@ -79440,7 +79952,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.testlibrary.sha.predicate; import jdk.test.lib.Platform; -@@ -61,19 +67,22 @@ +@@ -61,19 +67,22 @@ public class IntrinsicPredicates { public static final BooleanSupplier MD5_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", null, null), @@ -79465,7 +79977,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ public static final BooleanSupplier SHA256_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha256" }, null), -@@ -81,12 +90,14 @@ +@@ -81,12 +90,14 @@ public class IntrinsicPredicates { new OrPredicate(new CPUSpecificPredicate("s390.*", new String[] { "sha256" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64.*", new String[] { "sha" }, null), new OrPredicate(new CPUSpecificPredicate("ppc64le.*", new String[] { "sha" }, null), @@ -79481,9 +79993,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ public static final BooleanSupplier SHA512_INSTRUCTION_AVAILABLE = new OrPredicate(new CPUSpecificPredicate("aarch64.*", new String[] { "sha512" }, null), -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java b/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java ---- a/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java 2024-02-20 10:42:38.108861913 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java b/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java +index 35f357c22f2..e0643272e83 100644 +--- a/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java ++++ b/test/hotspot/jtreg/compiler/vectorapi/TestVectorTest.java @@ -20,6 +20,13 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -79498,7 +80011,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.vectorapi; import compiler.lib.ir_framework.*; -@@ -34,7 +41,7 @@ +@@ -34,7 +41,7 @@ import jdk.incubator.vector.VectorMask; * @modules jdk.incubator.vector * @library /test/lib / * @requires (os.simpleArch == "x64" & vm.cpu.features ~= ".*sse4.*" & (vm.opt.UseSSE == "null" | vm.opt.UseSSE > 3)) @@ -79507,9 +80020,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @run driver compiler.vectorapi.TestVectorTest */ public class TestVectorTest { -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java b/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java ---- a/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java 2024-02-20 10:42:38.108861913 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java b/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java +index b0037973ad1..3ed2735c525 100644 +--- a/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java ++++ b/test/hotspot/jtreg/compiler/vectorapi/VectorLogicalOpIdentityTest.java @@ -22,6 +22,12 @@ * questions. */ @@ -79523,7 +80037,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.vectorapi; import compiler.lib.ir_framework.*; -@@ -45,7 +51,7 @@ +@@ -45,7 +51,7 @@ import jdk.test.lib.Utils; * @key randomness * @library /test/lib / * @summary Add identity transformations for vector logic operations @@ -79532,9 +80046,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @modules jdk.incubator.vector * * @run driver compiler.vectorapi.VectorLogicalOpIdentityTest -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java b/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java ---- a/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java 2024-02-20 10:42:38.108861913 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java b/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java +index 154567922bd..d81a90f2fcb 100644 +--- a/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java ++++ b/test/hotspot/jtreg/compiler/vectorapi/VectorReverseBytesTest.java @@ -21,6 +21,12 @@ * questions. */ @@ -79548,7 +80063,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.vectorapi; import compiler.lib.ir_framework.*; -@@ -42,7 +48,7 @@ +@@ -42,7 +48,7 @@ import jdk.test.lib.Utils; * @library /test/lib / * @summary [vectorapi] REVERSE_BYTES for byte type should not emit any instructions * @requires vm.compiler2.enabled @@ -79557,209 +80072,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @modules jdk.incubator.vector * * @run driver compiler.vectorapi.VectorReverseBytesTest -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on array index fill - * @library /test/lib / -@@ -35,7 +41,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.ArrayIndexFillTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on array invariant fill - * @library /test/lib / -@@ -36,7 +42,7 @@ - * -XX:-OptimizeFill - * compiler.vectorization.runner.ArrayInvariantFillTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on bug-prone shift operation - * @library /test/lib / -@@ -35,7 +41,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.ArrayShiftOpTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on basic double operations - * @library /test/lib / -@@ -35,7 +41,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.BasicDoubleOpTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on basic float operations - * @library /test/lib / -@@ -35,7 +41,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.BasicFloatOpTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -23,6 +23,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on basic long operations - * @library /test/lib / -@@ -36,7 +42,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.BasicLongOpTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -23,6 +23,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on loop array index computation - * @library /test/lib / -@@ -36,7 +42,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.LoopArrayIndexComputeTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - */ - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java ---- a/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java 2024-02-20 10:42:38.112195242 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test - * @summary Vectorization test on reduction operations - * @library /test/lib / -@@ -35,7 +41,7 @@ - * -XX:+WhiteBoxAPI - * compiler.vectorization.runner.LoopReductionOpTest - * -- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") -+ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") - * @requires vm.compiler2.enabled & vm.flagless - * - */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java b/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java b/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java +index e3baed37804..18b9333b1d1 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestAutoVecIntMinMax.java @@ -21,6 +21,12 @@ * questions. */ @@ -79773,7 +80089,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package compiler.c2.irTests; import compiler.lib.ir_framework.*; -@@ -34,7 +40,7 @@ +@@ -34,7 +40,7 @@ import jdk.test.lib.Utils; * @library /test/lib / * @requires vm.compiler2.enabled * @requires (os.simpleArch == "x64" & (vm.opt.UseSSE == "null" | vm.opt.UseSSE > 3)) @@ -79782,9 +80098,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @run driver compiler.c2.irTests.TestAutoVecIntMinMax */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java b/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java b/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java +index 95970256c48..3fcb0c999cb 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestBufferVectorization.java @@ -21,6 +21,12 @@ * questions. */ @@ -79807,9 +80124,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * * @run driver compiler.vectorization.TestBufferVectorization array * @run driver compiler.vectorization.TestBufferVectorization arrayOffset -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java b/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java b/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java +index 4452e576867..7fc996888cd 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java @@ -21,12 +21,18 @@ * questions. */ @@ -79830,9 +80148,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestFloatConversionsVector */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java b/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java b/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java +index c64b851096d..8dcfbad3994 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestNumberOfContinuousZeros.java @@ -21,13 +21,20 @@ * questions. */ @@ -79855,9 +80174,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestNumberOfContinuousZeros */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java b/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java b/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java +index 6a709849b9c..0a209d2519a 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestPopulateIndex.java @@ -21,13 +21,20 @@ * questions. */ @@ -79880,9 +80200,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestPopulateIndex */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java b/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java b/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java +index 1144186d8e5..f36bb209a6b 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestReverseBitsVector.java @@ -20,12 +20,19 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -79904,9 +80225,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestReverseBitsVector */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java b/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java b/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java +index 47813e2790e..d30f2d3d177 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestReverseBytes.java @@ -20,12 +20,19 @@ * or visit www.oracle.com if you need additional information or have any * questions. @@ -79928,9 +80250,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestReverseBytes */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java b/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java ---- a/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java 2024-02-20 10:42:38.112195242 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java b/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java +index bf6a10b855f..b97c0461eaa 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java ++++ b/test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java @@ -21,12 +21,18 @@ * questions. */ @@ -79951,9 +80274,218 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @library /test/lib / * @run driver compiler.vectorization.TestSignumVector */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java b/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java ---- a/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java 2024-02-20 10:42:38.132195228 +0800 +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java +index a4eca0fe8dd..de44f60520a 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayIndexFillTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on array index fill +@@ -35,7 +41,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.ArrayIndexFillTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java +index 2e7302bba05..964c03955d1 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayInvariantFillTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on array invariant fill +@@ -41,7 +47,7 @@ + * -XX:+OptimizeFill + * compiler.vectorization.runner.ArrayInvariantFillTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java +index 74262142247..920f0418e10 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/ArrayShiftOpTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on bug-prone shift operation +@@ -35,7 +41,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.ArrayShiftOpTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java +index 2410ebe8554..1f0876eec56 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicDoubleOpTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on basic double operations +@@ -35,7 +41,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.BasicDoubleOpTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java +index c9eda7d7650..dd267e0ae4b 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on basic float operations +@@ -35,7 +41,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.BasicFloatOpTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java +index 80ebd7b64d0..22b92e861c5 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/BasicLongOpTest.java +@@ -22,6 +22,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on basic long operations +@@ -36,7 +42,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.BasicLongOpTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java +index 2bf59814b4f..f0bd2d2ffb4 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/LoopArrayIndexComputeTest.java +@@ -22,6 +22,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on loop array index computation +@@ -36,7 +42,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.LoopArrayIndexComputeTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + */ + +diff --git a/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java b/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java +index f1c8fea059b..9cf2023fa7d 100644 +--- a/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java ++++ b/test/hotspot/jtreg/compiler/vectorization/runner/LoopReductionOpTest.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + /* + * @test + * @summary Vectorization test on reduction operations +@@ -35,7 +41,7 @@ + * -XX:+WhiteBoxAPI + * compiler.vectorization.runner.LoopReductionOpTest + * +- * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") ++ * @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "loongarch64") + * @requires vm.compiler2.enabled + * + */ +diff --git a/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java b/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java +index a0dff95a23f..fd0fcbd3a90 100644 +--- a/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java ++++ b/test/hotspot/jtreg/gc/shenandoah/compiler/TestLinkToNativeRBP.java @@ -21,6 +21,12 @@ * questions. */ @@ -79976,10 +80508,12 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.gc.Shenandoah * * @run main/othervm --enable-native-access=ALL-UNNAMED -XX:+UnlockDiagnosticVMOptions -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/25064/NUMAHelper.java b/test/hotspot/jtreg/loongson/25064/NUMAHelper.java ---- a/test/hotspot/jtreg/loongson/25064/NUMAHelper.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/25064/NUMAHelper.java 2024-02-20 10:42:38.138861889 +0800 -@@ -0,0 +1,99 @@ +diff --git a/test/hotspot/jtreg/loongson/25064/NUMAHelper.java b/test/hotspot/jtreg/loongson/25064/NUMAHelper.java +new file mode 100644 +index 00000000000..ee0c4387eb3 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/25064/NUMAHelper.java +@@ -0,0 +1,100 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. @@ -80038,7 +80572,8 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + + static OutputAnalyzer invokeJvm(String... args) throws Exception { -+ return new OutputAnalyzer(ProcessTools.createTestJvm(args).start()); ++ ProcessBuilder pb = ProcessTools.createTestJavaProcessBuilder(args); ++ return new OutputAnalyzer(pb.start()); + } + + static int getNUMANodes() throws Exception { @@ -80079,9 +80614,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java ---- a/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java +new file mode 100644 +index 00000000000..9f7263f5081 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMADefault.java @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -80235,9 +80772,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + "-version"), nodes, 134217728L * nodes, true); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java ---- a/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java +new file mode 100644 +index 00000000000..e21dffa418a +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMADisabled.java @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -80333,9 +80872,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + o.shouldMatch("bool UseNUMA[ ]+= false"); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java ---- a/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java b/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java +new file mode 100644 +index 00000000000..c05b91e1dcf +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/25064/TestUseNUMAEnabled.java @@ -0,0 +1,165 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -80502,9 +81043,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + "-version"), nodes, 134217728L * nodes, true); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/25443/Test25443.java b/test/hotspot/jtreg/loongson/25443/Test25443.java ---- a/test/hotspot/jtreg/loongson/25443/Test25443.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/25443/Test25443.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/25443/Test25443.java b/test/hotspot/jtreg/loongson/25443/Test25443.java +new file mode 100644 +index 00000000000..200485d1fdc +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/25443/Test25443.java @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2015, 2022, Loongson Technology. All rights reserved. @@ -80564,9 +81107,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/26733/Test26733.java b/test/hotspot/jtreg/loongson/26733/Test26733.java ---- a/test/hotspot/jtreg/loongson/26733/Test26733.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/26733/Test26733.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/26733/Test26733.java b/test/hotspot/jtreg/loongson/26733/Test26733.java +new file mode 100644 +index 00000000000..83ba5912879 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/26733/Test26733.java @@ -0,0 +1,570 @@ +/* + * Copyright (c) 2022, Loongson Technology. All rights reserved. @@ -81138,9 +81683,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/30358/MEMBARType.java b/test/hotspot/jtreg/loongson/30358/MEMBARType.java ---- a/test/hotspot/jtreg/loongson/30358/MEMBARType.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/30358/MEMBARType.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/30358/MEMBARType.java b/test/hotspot/jtreg/loongson/30358/MEMBARType.java +new file mode 100644 +index 00000000000..71636057901 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/30358/MEMBARType.java @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -81166,23 +81713,56 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + * + */ + -+public final class MEMBARType { -+ public static final String DBARINSCODE = "00 7238"; // dbar hint -+ public static final String DBARSTR = "dbar 0x"; -+ -+ public static final String LoadLoad = "15"; -+ public static final String LoadStore = "16"; -+ public static final String StoreLoad = "19"; -+ public static final String StoreStore = "1a"; -+ public static final String AnyAny = "10"; -+ -+ public static final String Acquire = "14"; // LoadStore & LoadLoad -+ public static final String Release = "12"; // LoadStore & StoreStore -+ public static final String Volatile = StoreLoad; -+} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java b/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java ---- a/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java 2024-02-20 10:42:38.138861889 +0800 ++public final class MEMBARType { ++ public static final String DBARINSCODE = "00 7238"; // dbar hint ++ public static final String DBARSTR = "dbar 0x"; ++ ++ public static final String LoadLoad = "15"; ++ public static final String LoadStore = "16"; ++ public static final String StoreLoad = "19"; ++ public static final String StoreStore = "1a"; ++ public static final String AnyAny = "10"; ++ ++ public static final String Acquire = "14"; // LoadStore & LoadLoad ++ public static final String Release = "12"; // LoadStore & StoreStore ++ public static final String Volatile = StoreLoad; ++} +diff --git a/test/hotspot/jtreg/loongson/30358/TEST.properties b/test/hotspot/jtreg/loongson/30358/TEST.properties +new file mode 100644 +index 00000000000..9cfabdea488 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/30358/TEST.properties +@@ -0,0 +1,25 @@ ++/* ++ * Copyright (c) 2023, Loongson Technology. All rights reserved. ++ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. ++ * ++ * This code is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 only, as ++ * published by the Free Software Foundation. ++ * ++ * This code is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * version 2 for more details (a copy is included in the LICENSE file that ++ * accompanied this code). ++ * ++ * You should have received a copy of the GNU General Public License version ++ * 2 along with this work; if not, write to the Free Software Foundation, ++ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA ++ * or visit www.oracle.com if you need additional information or have any ++ * questions. ++ * ++ */ ++ ++maxOutputSize = 2500000 +diff --git a/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java b/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java +new file mode 100644 +index 00000000000..92a4f00c247 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/30358/TestLoadLoad.java @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -81233,7 +81813,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + command.add("-XX:+PrintInterpreter"); + command.add("-version"); + -+ ProcessBuilder pb = ProcessTools.createJavaProcessBuilder(command); ++ ProcessBuilder pb = ProcessTools.createLimitedTestJavaProcessBuilder(command); + OutputAnalyzer analyzer = new OutputAnalyzer(pb.start()); + + analyzer.shouldHaveExitValue(0); @@ -81313,9 +81893,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java b/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java ---- a/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java b/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java +new file mode 100644 +index 00000000000..2bc9ada7ce8 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/30358/TestNewObjectWithFinal.java @@ -0,0 +1,247 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -81389,7 +81971,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + command.add("-XX:CompileCommand=compileonly," + Launcher.class.getName() + "::" + "test"); + command.add(Launcher.class.getName()); + -+ ProcessBuilder pb = ProcessTools.createJavaProcessBuilder(command); ++ ProcessBuilder pb = ProcessTools.createLimitedTestJavaProcessBuilder(command); + OutputAnalyzer analyzer = new OutputAnalyzer(pb.start()); + + analyzer.shouldHaveExitValue(0); @@ -81564,38 +82146,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/30358/TEST.properties b/test/hotspot/jtreg/loongson/30358/TEST.properties ---- a/test/hotspot/jtreg/loongson/30358/TEST.properties 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/30358/TEST.properties 2024-02-20 10:42:38.138861889 +0800 -@@ -0,0 +1,25 @@ -+/* -+ * Copyright (c) 2023, Loongson Technology. All rights reserved. -+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. -+ * -+ * This code is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 only, as -+ * published by the Free Software Foundation. -+ * -+ * This code is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+ * version 2 for more details (a copy is included in the LICENSE file that -+ * accompanied this code). -+ * -+ * You should have received a copy of the GNU General Public License version -+ * 2 along with this work; if not, write to the Free Software Foundation, -+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA -+ * or visit www.oracle.com if you need additional information or have any -+ * questions. -+ * -+ */ -+ -+maxOutputSize = 2500000 -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/30358/TestVolatile.java b/test/hotspot/jtreg/loongson/30358/TestVolatile.java ---- a/test/hotspot/jtreg/loongson/30358/TestVolatile.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/30358/TestVolatile.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/30358/TestVolatile.java b/test/hotspot/jtreg/loongson/30358/TestVolatile.java +new file mode 100644 +index 00000000000..9fefa381c38 +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/30358/TestVolatile.java @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -81673,7 +82228,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + command.add("-XX:CompileCommand=dontinline," + Launcher.class.getName() + "::" + "*"); + command.add(Launcher.class.getName()); + -+ ProcessBuilder pb = ProcessTools.createJavaProcessBuilder(command); ++ ProcessBuilder pb = ProcessTools.createLimitedTestJavaProcessBuilder(command); + + OutputAnalyzer analyzer = new OutputAnalyzer(pb.start()); + @@ -81955,9 +82510,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/loongson/7432/Test7423.java b/test/hotspot/jtreg/loongson/7432/Test7423.java ---- a/test/hotspot/jtreg/loongson/7432/Test7423.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/hotspot/jtreg/loongson/7432/Test7423.java 2024-02-20 10:42:38.138861889 +0800 +diff --git a/test/hotspot/jtreg/loongson/7432/Test7423.java b/test/hotspot/jtreg/loongson/7432/Test7423.java +new file mode 100644 +index 00000000000..defa026410b +--- /dev/null ++++ b/test/hotspot/jtreg/loongson/7432/Test7423.java @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2015, 2018, Loongson Technology. All rights reserved. @@ -82020,22 +82577,49 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + } + +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java b/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java ---- a/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java 2024-02-20 10:42:38.242195141 +0800 -@@ -22,6 +22,12 @@ +diff --git a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java +index e75e6643809..88bd67d6b39 100644 +--- a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ++++ b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java +@@ -21,6 +21,12 @@ + * questions. */ ++/* ++ * This file has been modified by Loongson Technology in 2022, These ++ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ /* + * @test ReservedStackTest + * +@@ -240,7 +246,7 @@ public class ReservedStackTest { + return Platform.isAix() || + (Platform.isLinux() && + (Platform.isPPC() || Platform.isS390x() || Platform.isX64() || +- Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64())) || ++ Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64() || Platform.isLoongArch64())) || + Platform.isOSX(); + } + +diff --git a/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java b/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java +index a7faed10e02..8d326d428e6 100644 +--- a/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java ++++ b/test/hotspot/jtreg/runtime/os/TestTracePageSizes.java +@@ -21,6 +21,12 @@ + * questions. + */ + ++/* + * This file has been modified by Loongson Technology in 2023, These + * modifications are Copyright (c) 2023, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test id=no-options * @summary Run test with no arguments apart from the ones required by - * the test. @@ -38,7 +44,7 @@ * @library /test/lib * @build jdk.test.lib.Platform @@ -82045,34 +82629,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.gc != "Z" * @run main/othervm -XX:+AlwaysPreTouch -Xmx128m -Xlog:pagesize:ps-%p.log -XX:+UseLargePages -XX:LargePageSizeInBytes=2m TestTracePageSizes * @run main/othervm -XX:+AlwaysPreTouch -Xmx2g -Xlog:pagesize:ps-%p.log -XX:+UseLargePages -XX:LargePageSizeInBytes=1g TestTracePageSizes -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java ---- a/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/runtime/ReservedStack/ReservedStackTest.java 2024-02-20 10:42:38.162195204 +0800 -@@ -22,6 +22,12 @@ - */ - - /* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ -+/* - * @test ReservedStackTest - * - * @requires vm.opt.DeoptimizeALot != true -@@ -240,7 +246,7 @@ - return Platform.isAix() || - (Platform.isLinux() && - (Platform.isPPC() || Platform.isS390x() || Platform.isX64() || -- Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64())) || -+ Platform.isX86() || Platform.isAArch64() || Platform.isRISCV64() || Platform.isLoongArch64())) || - Platform.isOSX(); - } - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java b/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java ---- a/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java 2024-02-20 10:42:38.248861802 +0800 +diff --git a/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java b/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java +index 5c41565db8d..ec9499d92a9 100644 +--- a/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java ++++ b/test/hotspot/jtreg/serviceability/AsyncGetCallTrace/MyPackage/ASGCTBaseTest.java @@ -22,6 +22,12 @@ * questions. */ @@ -82086,7 +82646,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package MyPackage; /** -@@ -29,7 +35,7 @@ +@@ -29,7 +35,7 @@ package MyPackage; * @summary Verifies that AsyncGetCallTrace is call-able and provides sane information. * @compile ASGCTBaseTest.java * @requires os.family == "linux" @@ -82095,9 +82655,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.jvmti * @run main/othervm/native -agentlib:AsyncGetCallTraceTest MyPackage.ASGCTBaseTest */ -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java b/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java ---- a/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java 2024-02-20 10:42:38.612194850 +0800 +diff --git a/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java b/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java +index 5d9c3982fb6..f346e763db5 100644 +--- a/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java ++++ b/test/hotspot/jtreg/serviceability/sa/TestJhsdbJstackLineNumbers.java @@ -21,6 +21,12 @@ * questions. */ @@ -82111,7 +82672,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ import java.io.OutputStream; import java.util.regex.Matcher; import java.util.regex.Pattern; -@@ -36,7 +42,7 @@ +@@ -36,7 +42,7 @@ import jdk.test.lib.SA.SATestUtils; /** * @test * @requires vm.hasSA @@ -82120,9 +82681,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires os.family=="windows" | os.family == "linux" | os.family == "mac" * @requires vm.flagless * @library /test/lib -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java ---- a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java 2024-02-20 10:42:38.638861497 +0800 +diff --git a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java +index 4794a9c8127..cc4e5c0b64f 100644 +--- a/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java ++++ b/test/hotspot/jtreg/testlibrary_tests/ir_framework/tests/TestIRMatching.java @@ -21,6 +21,12 @@ * questions. */ @@ -82136,7 +82698,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package ir_framework.tests; import compiler.lib.ir_framework.*; -@@ -215,7 +221,7 @@ +@@ -215,7 +221,7 @@ public class TestIRMatching { runCheck(BadFailOnConstraint.create(Membar.class, "membar()", 1, "MemBar")); String cmp; @@ -82145,9 +82707,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ cmp = "CMP"; } else if (Platform.isS390x()){ cmp = "CLFI"; -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java ---- a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java 2024-02-20 10:42:39.085527812 +0800 +diff --git a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java +index 16863189500..e2f3a13473b 100644 +--- a/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java ++++ b/test/hotspot/jtreg/vmTestbase/nsk/share/jdi/ArgumentHandler.java @@ -21,6 +21,12 @@ * questions. */ @@ -82161,7 +82724,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package nsk.share.jdi; import nsk.share.*; -@@ -520,21 +526,22 @@ +@@ -520,21 +526,22 @@ class CheckedFeatures { * available only on the Microsoft Windows platform. * " */ @@ -82199,7 +82762,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ // listening connectors /* -@@ -546,21 +553,22 @@ +@@ -546,21 +553,22 @@ class CheckedFeatures { * It is available only on the Microsoft Windows platform. * " */ @@ -82237,7 +82800,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ // launching connectors /* -@@ -575,78 +583,82 @@ +@@ -575,78 +583,82 @@ class CheckedFeatures { * Windows, the shared memory transport is used. On Linux the socket transport is used. * " */ @@ -82373,85 +82936,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + {"aix-ppc64", "dt_shmem"}, }; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java b/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java ---- a/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java 2024-02-20 10:42:39.452194188 +0800 -@@ -23,6 +23,13 @@ - * questions. - * - */ -+ -+/* -+ * This file has been modified by Loongson Technology in 2023, These -+ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - package platform; - - import jdk.internal.foreign.abi.SharedUtils; -@@ -261,6 +268,58 @@ - - /** - * The {@code bool} native type. -+ */ -+ public static final ValueLayout.OfBoolean C_BOOL = ValueLayout.JAVA_BOOLEAN; -+ -+ /** -+ * The {@code char} native type. -+ */ -+ public static final ValueLayout.OfByte C_CHAR = ValueLayout.JAVA_BYTE; -+ -+ /** -+ * The {@code short} native type. -+ */ -+ public static final ValueLayout.OfShort C_SHORT = ValueLayout.JAVA_SHORT; -+ -+ /** -+ * The {@code int} native type. -+ */ -+ public static final ValueLayout.OfInt C_INT = ValueLayout.JAVA_INT; -+ -+ /** -+ * The {@code long} native type. -+ */ -+ public static final ValueLayout.OfLong C_LONG = ValueLayout.JAVA_LONG; -+ -+ /** -+ * The {@code long long} native type. -+ */ -+ public static final ValueLayout.OfLong C_LONG_LONG = ValueLayout.JAVA_LONG; -+ -+ /** -+ * The {@code float} native type. -+ */ -+ public static final ValueLayout.OfFloat C_FLOAT = ValueLayout.JAVA_FLOAT; -+ -+ /** -+ * The {@code double} native type. -+ */ -+ public static final ValueLayout.OfDouble C_DOUBLE = ValueLayout.JAVA_DOUBLE; -+ -+ /** -+ * The {@code T*} native type. -+ */ -+ public static final AddressLayout C_POINTER = SharedUtils.C_POINTER; -+ -+ } -+ -+ public static final class LoongArch64 { -+ -+ // Suppresses default constructor, ensuring non-instantiability. -+ private LoongArch64() {} -+ -+ /** -+ * The {@code bool} native type. - */ - public static final ValueLayout.OfBoolean C_BOOL = ValueLayout.JAVA_BOOLEAN; - -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java b/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java ---- a/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java 2024-02-20 10:42:39.452194188 +0800 +diff --git a/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java b/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java +new file mode 100644 +index 00000000000..399cdbb252e +--- /dev/null ++++ b/test/jdk/java/foreign/callarranger/TestLoongArch64CallArranger.java @@ -0,0 +1,521 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. @@ -82974,22 +83463,98 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + }); + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java b/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java ---- a/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java 2024-02-20 10:42:39.822193897 +0800 -@@ -32,6 +32,12 @@ +diff --git a/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java b/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java +index 97856075bef..c6d6fa8efb5 100644 +--- a/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java ++++ b/test/jdk/java/foreign/callarranger/platform/PlatformLayouts.java +@@ -23,6 +23,13 @@ + * questions. + * */ ++ ++/* ++ * This file has been modified by Loongson Technology in 2023, These ++ * modifications are Copyright (c) 2022, 2023, Loongson Technology, and are made ++ * available on the same license terms set forth above. ++ */ ++ + package platform; - /* + import jdk.internal.foreign.abi.SharedUtils; +@@ -305,4 +312,56 @@ public final class PlatformLayouts { + public static final AddressLayout C_POINTER = SharedUtils.C_POINTER; + + } ++ ++ public static final class LoongArch64 { ++ ++ // Suppresses default constructor, ensuring non-instantiability. ++ private LoongArch64() {} ++ ++ /** ++ * The {@code bool} native type. ++ */ ++ public static final ValueLayout.OfBoolean C_BOOL = ValueLayout.JAVA_BOOLEAN; ++ ++ /** ++ * The {@code char} native type. ++ */ ++ public static final ValueLayout.OfByte C_CHAR = ValueLayout.JAVA_BYTE; ++ ++ /** ++ * The {@code short} native type. ++ */ ++ public static final ValueLayout.OfShort C_SHORT = ValueLayout.JAVA_SHORT; ++ ++ /** ++ * The {@code int} native type. ++ */ ++ public static final ValueLayout.OfInt C_INT = ValueLayout.JAVA_INT; ++ ++ /** ++ * The {@code long} native type. ++ */ ++ public static final ValueLayout.OfLong C_LONG = ValueLayout.JAVA_LONG; ++ ++ /** ++ * The {@code long long} native type. ++ */ ++ public static final ValueLayout.OfLong C_LONG_LONG = ValueLayout.JAVA_LONG; ++ ++ /** ++ * The {@code float} native type. ++ */ ++ public static final ValueLayout.OfFloat C_FLOAT = ValueLayout.JAVA_FLOAT; ++ ++ /** ++ * The {@code double} native type. ++ */ ++ public static final ValueLayout.OfDouble C_DOUBLE = ValueLayout.JAVA_DOUBLE; ++ ++ /** ++ * The {@code T*} native type. ++ */ ++ public static final AddressLayout C_POINTER = SharedUtils.C_POINTER; ++ ++ } + } +diff --git a/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java b/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java +index ca1292afd3a..a8052f06143 100644 +--- a/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java ++++ b/test/jdk/java/util/concurrent/ConcurrentHashMap/MapLoops.java +@@ -31,6 +31,12 @@ + * http://creativecommons.org/publicdomain/zero/1.0/ + */ + ++/* + * This file has been modified by Loongson Technology in 2022, These + * modifications are Copyright (c) 2022, Loongson Technology, and are made + * available on the same license terms set forth above. + */ + -+/* + /* * @test * @bug 4486658 - * @summary Exercise multithreaded maps, by default ConcurrentHashMap. @@ -48,7 +54,7 @@ /* * @test @@ -82999,9 +83564,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ * @requires vm.debug * @library /test/lib * @run main/othervm/timeout=1600 -XX:+UnlockExperimentalVMOptions -XX:LockingMode=0 -XX:+VerifyHeavyMonitors MapLoops -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ---- a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2024-01-17 09:43:22.000000000 +0800 -+++ b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java 2024-02-20 10:42:40.288860195 +0800 +diff --git a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java +index c5166580010..f51a1468754 100644 +--- a/test/jdk/jdk/jfr/event/os/TestCPUInformation.java ++++ b/test/jdk/jdk/jfr/event/os/TestCPUInformation.java @@ -21,6 +21,12 @@ * questions. */ @@ -83015,7 +83581,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package jdk.jfr.event.os; import java.util.List; -@@ -52,8 +58,8 @@ +@@ -52,8 +58,8 @@ public class TestCPUInformation { Events.assertField(event, "hwThreads").atLeast(1); Events.assertField(event, "cores").atLeast(1); Events.assertField(event, "sockets").atLeast(1); @@ -83026,9 +83592,10 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ } } } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java b/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java ---- a/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java 2024-01-17 09:43:23.000000000 +0800 -+++ b/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java 2024-02-20 10:42:40.358860140 +0800 +diff --git a/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java b/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java +index 37d770b62a5..1c3df61b8a7 100644 +--- a/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java ++++ b/test/jdk/sun/net/InetAddress/nameservice/simple/DefaultCaching.java @@ -21,12 +21,19 @@ * questions. */ @@ -83050,7 +83617,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ */ import java.net.InetAddress; import java.net.UnknownHostException; -@@ -63,7 +70,7 @@ +@@ -63,7 +70,7 @@ public class DefaultCaching { test("foo", "10.5.18.22", true, 5); // now delay to see if theclub has expired @@ -83059,12 +83626,13 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ test("foo", "10.5.18.22", true, 5); test("theclub", "129.156.220.1", true, 6); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/jdk/sun/security/pkcs11/PKCS11Test.java b/test/jdk/sun/security/pkcs11/PKCS11Test.java ---- a/test/jdk/sun/security/pkcs11/PKCS11Test.java 2024-01-17 09:43:23.000000000 +0800 -+++ b/test/jdk/sun/security/pkcs11/PKCS11Test.java 2024-02-20 10:42:40.482193375 +0800 -@@ -21,6 +21,12 @@ - * questions. - */ +diff --git a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java +index f8ce856bddd..84b7ecba37f 100644 +--- a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java ++++ b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java +@@ -33,6 +33,12 @@ import java.util.HashSet; + import java.util.List; + import java.util.Set; +/* + * This file has been modified by Loongson Technology in 2022, These @@ -83072,21 +83640,22 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + * available on the same license terms set forth above. + */ + - // common infrastructure for SunPKCS11 tests - - import java.io.ByteArrayOutputStream; -@@ -620,6 +626,8 @@ - "/usr/lib/powerpc64le-linux-gnu/", - "/usr/lib/powerpc64le-linux-gnu/nss/", - "/usr/lib64/"}); -+ osMap.put("Linux-loongarch64-64", new String[]{"/usr/lib/loongarch64-linux-gnu/", -+ "/usr/lib64/"}); - osMap.put("Linux-s390x-64", new String[]{"/usr/lib64/"}); - osMap.put("Windows-x86-32", new String[]{}); - osMap.put("Windows-amd64-64", new String[]{}); -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/lib/jdk/test/lib/Platform.java b/test/lib/jdk/test/lib/Platform.java ---- a/test/lib/jdk/test/lib/Platform.java 2024-01-17 09:43:23.000000000 +0800 -+++ b/test/lib/jdk/test/lib/Platform.java 2024-02-20 10:42:41.242192777 +0800 + /** + * @test + * @summary Verify that for each group of mutually exclusive predicates defined +@@ -45,7 +51,7 @@ import java.util.Set; + */ + public class TestMutuallyExclusivePlatformPredicates { + private static enum MethodGroup { +- ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86"), ++ ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86", "isLoongArch64"), + BITNESS("is32bit", "is64bit"), + OS("isAix", "isLinux", "isOSX", "isWindows"), + VM_TYPE("isClient", "isServer", "isMinimal", "isZero", "isEmbedded"), +diff --git a/test/lib/jdk/test/lib/Platform.java b/test/lib/jdk/test/lib/Platform.java +index 92663c65d0f..311facd8ee1 100644 +--- a/test/lib/jdk/test/lib/Platform.java ++++ b/test/lib/jdk/test/lib/Platform.java @@ -21,6 +21,12 @@ * questions. */ @@ -83100,7 +83669,7 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ package jdk.test.lib; import java.io.BufferedReader; -@@ -233,6 +239,10 @@ +@@ -234,6 +240,10 @@ public class Platform { return isArch("(i386)|(x86(?!_64))"); } @@ -83111,34 +83680,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ public static String getOsArch() { return osArch; } -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java ---- a/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java 2024-01-17 09:43:23.000000000 +0800 -+++ b/test/lib-test/jdk/test/lib/TestMutuallyExclusivePlatformPredicates.java 2024-02-20 10:42:41.238859445 +0800 -@@ -33,6 +33,12 @@ - import java.util.List; - import java.util.Set; - -+/* -+ * This file has been modified by Loongson Technology in 2022, These -+ * modifications are Copyright (c) 2021, 2022, Loongson Technology, and are made -+ * available on the same license terms set forth above. -+ */ -+ - /** - * @test - * @summary Verify that for each group of mutually exclusive predicates defined -@@ -45,7 +51,7 @@ - */ - public class TestMutuallyExclusivePlatformPredicates { - private static enum MethodGroup { -- ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86"), -+ ARCH("isAArch64", "isARM", "isRISCV64", "isPPC", "isS390x", "isX64", "isX86", "isLoongArch64"), - BITNESS("is32bit", "is64bit"), - OS("isAix", "isLinux", "isOSX", "isWindows"), - VM_TYPE("isClient", "isServer", "isMinimal", "isZero", "isEmbedded"), -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/micro/org/openjdk/bench/loongarch/C2Memory.java b/test/micro/org/openjdk/bench/loongarch/C2Memory.java ---- a/test/micro/org/openjdk/bench/loongarch/C2Memory.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/micro/org/openjdk/bench/loongarch/C2Memory.java 2024-02-20 10:42:41.275526082 +0800 +diff --git a/test/micro/org/openjdk/bench/loongarch/C2Memory.java b/test/micro/org/openjdk/bench/loongarch/C2Memory.java +new file mode 100644 +index 00000000000..65cf1773d09 +--- /dev/null ++++ b/test/micro/org/openjdk/bench/loongarch/C2Memory.java @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2021, Loongson Technology. All rights reserved. @@ -83207,9 +83753,11 @@ diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/ + b_array2[xstart] = carry; + } +} -diff -Naur -x .git -x .github -x .gitattributes -x .gitignore -x .jcheck a/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java b/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java ---- a/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java 1970-01-01 08:00:00.000000000 +0800 -+++ b/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java 2024-02-20 10:42:41.275526082 +0800 +diff --git a/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java b/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java +new file mode 100644 +index 00000000000..1ee6649cda3 +--- /dev/null ++++ b/test/micro/org/openjdk/bench/loongarch/MisAlignVector.java @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2023, Loongson Technology. All rights reserved. diff --git a/openjdk-21.spec b/openjdk-21.spec index e7b031278e4b0d5b69feb92a28c7daf3814a75e0..d57d3441cd49810e0bec207f9590d6e5a128d359 100644 --- a/openjdk-21.spec +++ b/openjdk-21.spec @@ -897,7 +897,7 @@ Name: java-21-%{origin} Version: %{newjavaver}.%{buildver} # This package needs `.rolling` as part of Release so as to not conflict on install with # java-X-openjdk. I.e. when latest rolling release is also an LTS release packaged as -Release: 1 +Release: 2 # java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons # and this change was brought into RHEL-4. java-1.5.0-ibm packages @@ -1794,6 +1794,9 @@ cjc.mainProgram(arg) %changelog +* Thu Jun 20 2024 aoqi - 1:21.0.3.9-2 +- update LoongArch64 port to jdk21.0.3 + * Thu Apr 25 2024 kuenking111 - 1:21.0.3.9-1 - add add-downgrade-the-glibc-symbol-of-fcntl.patch