From 6d0e7e5ff76044cae69965d95b5c13b8f7cd10ba Mon Sep 17 00:00:00 2001 From: swcompiler Date: Fri, 22 Nov 2024 14:20:46 +0800 Subject: [PATCH] Sw64 Port mpfr --- Sw64-Port-mpfr.patch | 134 +++++++++++++++++++++++++++++++++++++++++++ mpfr.spec | 8 ++- 2 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 Sw64-Port-mpfr.patch diff --git a/Sw64-Port-mpfr.patch b/Sw64-Port-mpfr.patch new file mode 100644 index 0000000..ce98b27 --- /dev/null +++ b/Sw64-Port-mpfr.patch @@ -0,0 +1,134 @@ +diff --git a/config.guess b/config.guess +index 7f76b62..84211a7 100755 +--- a/config.guess ++++ b/config.guess +@@ -1143,6 +1143,17 @@ EOF + sparc:Linux:*:* | sparc64:Linux:*:*) + GUESS=$UNAME_MACHINE-unknown-linux-$LIBC + ;; ++ sw_64:Linux:*:*) ++ case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in ++ SW6) UNAME_MACHINE=sw_64sw6 ;; ++ SW6A) UNAME_MACHINE=sw_64sw6a ;; ++ SW6B) UNAME_MACHINE=sw_64sw6b ;; ++ SW8A) UNAME_MACHINE=sw_64sw8a ;; ++ esac ++ objdump --private-headers /bin/sh | grep -q ld.so.1 ++ if test "$?" = 0 ; then LIBC=gnulibc1 ; fi ++ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" ++ exit ;; + tile*:Linux:*:*) + GUESS=$UNAME_MACHINE-unknown-linux-$LIBC + ;; +diff --git a/config.sub b/config.sub +index dba16e8..a8fbed2 100755 +--- a/config.sub ++++ b/config.sub +@@ -1267,6 +1267,7 @@ case $cpu-$vendor in + | sparclite \ + | sparcv8 | sparcv9 | sparcv9b | sparcv9v | sv1 | sx* \ + | spu \ ++ | sw_64 | sw_64sw6a | sw_64sw6b | sw_64sw8a \ + | tahoe \ + | thumbv7* \ + | tic30 | tic4x | tic54x | tic55x | tic6x | tic80 \ +diff --git a/src/mpfr-longlong.h b/src/mpfr-longlong.h +index 8e71eea..2279a23 100644 +--- a/src/mpfr-longlong.h ++++ b/src/mpfr-longlong.h +@@ -1903,6 +1903,95 @@ extern UWtype __MPN(udiv_qrnnd) (UWtype *, UWtype, UWtype, UWtype); + #endif + #endif + ++//__sw_64 start ++#if defined (__sw_64) && W_TYPE_SIZE == 64 ++/* Most sw_64-based machines, except Cray systems. */ ++#if defined (__GNUC__) ++#if __GMP_GNUC_PREREQ (3,3) ++#define umul_ppmm(ph, pl, m0, m1) \ ++ do { \ ++ UDItype __m0 = (m0), __m1 = (m1); \ ++ (ph) = __builtin_sw_64_umulh (__m0, __m1); \ ++ (pl) = __m0 * __m1; \ ++ } while (0) ++#else ++#define umul_ppmm(ph, pl, m0, m1) \ ++ do { \ ++ UDItype __m0 = (m0), __m1 = (m1); \ ++ __asm__ ("umulh %r1,%2,%0" \ ++ : "=r" (ph) \ ++ : "%rJ" (__m0), "rI" (__m1)); \ ++ (pl) = __m0 * __m1; \ ++ } while (0) ++#endif ++#define UMUL_TIME 18 ++#else /* ! __GNUC__ */ ++#include ++#define umul_ppmm(ph, pl, m0, m1) \ ++ do { \ ++ UDItype __m0 = (m0), __m1 = (m1); \ ++ (ph) = __UMULH (__m0, __m1); \ ++ (pl) = __m0 * __m1; \ ++ } while (0) ++#endif ++#ifndef LONGLONG_STANDALONE ++#define udiv_qrnnd(q, r, n1, n0, d) \ ++ do { UWtype __di; \ ++ __di = __MPN(invert_limb) (d); \ ++ udiv_qrnnd_preinv (q, r, n1, n0, d, __di); \ ++ } while (0) ++#define UDIV_PREINV_ALWAYS 1 ++#define UDIV_NEEDS_NORMALIZATION 1 ++#define UDIV_TIME 220 ++#endif /* LONGLONG_STANDALONE. */ ++ ++/* clz_tab is required in all configurations, since mpn/sw_64/cntlz.asm ++ always goes into libgmp.so, even when not actually used. */ ++#define COUNT_LEADING_ZEROS_NEED_CLZ_TAB ++ ++#if defined (__GNUC__) && HAVE_HOST_CPU_sw_64_CIX ++#define count_leading_zeros(COUNT,X) \ ++ __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X)) ++#define count_trailing_zeros(COUNT,X) \ ++ __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X)) ++#endif /* clz/ctz using cix */ ++ ++#if ! defined (count_leading_zeros) \ ++ && defined (__GNUC__) && ! defined (LONGLONG_STANDALONE) ++/* SW_64_CMPBGE_0 gives "cmpbge $31,src,dst", ie. test src bytes == 0. ++ "$31" is written explicitly in the asm, since an "r" constraint won't ++ select reg 31. There seems no need to worry about "r31" syntax for cray, ++ since gcc itself (pre-release 3.4) emits just $31 in various places. */ ++#define SW_64_CMPBGE_0(dst, src) \ ++ do { asm ("cmpgeb $31, %1, %0" : "=r" (dst) : "r" (src)); } while (0) ++/* Zero bytes are turned into bits with cmpbge, a __clz_tab lookup counts ++ them, locating the highest non-zero byte. A second __clz_tab lookup ++ counts the leading zero bits in that byte, giving the result. */ ++#define count_leading_zeros(count, x) \ ++ do { \ ++ UWtype __clz__b, __clz__c, __clz__x = (x); \ ++ SW_64_CMPBGE_0 (__clz__b, __clz__x); /* zero bytes. */ \ ++ __clz__b = __clz_tab[(__clz__b >> 1) ^ 0x7F]; /* 8 to 1 byte. */ \ ++ __clz__b = __clz__b * 8 - 7; /* 57 to 1 shift. */ \ ++ __clz__x >>= __clz__b; \ ++ __clz__c = __clz_tab[__clz__x]; /* 8 to 1 bit. */ \ ++ __clz__b = 65 - __clz__b; \ ++ (count) = __clz__b - __clz__c; \ ++ } while (0) ++#define COUNT_LEADING_ZEROS_NEED_CLZ_TAB ++#endif /* clz using cmpbge */ ++ ++#if ! defined (count_leading_zeros) && ! defined (LONGLONG_STANDALONE) ++#if HAVE_ATTRIBUTE_CONST ++long __MPN(count_leading_zeros) (UDItype) __attribute__ ((const)); ++#else ++long __MPN(count_leading_zeros) (UDItype); ++#endif ++#define count_leading_zeros(count, x) \ ++ ((count) = __MPN(count_leading_zeros) (x)) ++#endif /* clz using mpn */ ++#endif /* __sw_64. */ ++ + #if (defined (__vax) || defined (__vax__)) && W_TYPE_SIZE == 32 + #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \ diff --git a/mpfr.spec b/mpfr.spec index 38c82a2..243fdac 100644 --- a/mpfr.spec +++ b/mpfr.spec @@ -1,6 +1,6 @@ Name: mpfr Version: 4.2.1 -Release: 1 +Release: 2 Summary: A C library for multiple-precision floating-point computations URL: http://www.mpfr.org/ License: LGPLv3+ and GPLv3+ and GFDL-1.2-only @@ -10,6 +10,9 @@ Requires: gmp >= 4.2.3 Source0: http://www.mpfr.org/%{name}-%{version}/%{name}-%{version}.tar.xz +# Sw64 Port +Patch1001: Sw64-Port-mpfr.patch + %description MPFR is a C library for arbitrary-precision binary floating-point computation with correct rounding, based on Multi-Precision Library. The computation is @@ -78,6 +81,9 @@ fi %{_libdir}/pkgconfig/mpfr.pc %changelog +* Fri Nov 22 2024 swcompiler - 4.2.1-2 +- Sw64 Port + * Mon Feb 26 2024 Liu Chao - 4.2.1-1 - Upgrade to 4.2.1 - Bug fixes -- Gitee