diff --git a/Libraries/AIR32F10xLib/src/air32f10x_flash.c b/Libraries/AIR32F10xLib/src/air32f10x_flash.c index ed8c2948ec303fcde5588b12707d1dad1ad8ccdf..6004e0a91d40885a237e8f3a9081bf59b67a482d 100644 --- a/Libraries/AIR32F10xLib/src/air32f10x_flash.c +++ b/Libraries/AIR32F10xLib/src/air32f10x_flash.c @@ -650,25 +650,25 @@ __STATIC_INLINE void SetStrt(void) #elif defined(__GNUC__) void SetStrt(void) { - asm("MOV R0, PC"); - asm("LDR R1, [R0,#16]"); - asm("LDR R1, [R0,#32]"); - asm("LDR R0, =0x40022010"); - asm("LDR R1, =0x60"); - asm("STR R1,[R0]"); - asm("NOP"); - asm("NOP"); - asm("NOP"); - asm("NOP"); - asm("NOP"); - asm("NOP"); - asm("FLAGLABLE:"); - asm("LDR R1, =0x4002200C"); - asm("LDR R2, [R1]"); - asm("AND R2, #0x01"); - asm("CMP R2, #0x00"); - asm("BNE FLAGLABLE"); - asm("BX lr"); + __asm("MOV R0, PC"); + __asm("LDR R1, [R0,#16]"); + __asm("LDR R1, [R0,#32]"); + __asm("LDR R0, =0x40022010"); + __asm("LDR R1, =0x60"); + __asm("STR R1,[R0]"); + __asm("NOP"); + __asm("NOP"); + __asm("NOP"); + __asm("NOP"); + __asm("NOP"); + __asm("NOP"); + __asm("FLAGLABLE:"); + __asm("LDR R1, =0x4002200C"); + __asm("LDR R2, [R1]"); + __asm("AND R2, #0x01"); + __asm("CMP R2, #0x00"); + __asm("BNE FLAGLABLE"); + __asm("BX lr"); } #endif